Cross Reference: /xsrc/external/mit/xf86-video-xgi/dist/src/init.c

Lines Matching refs:P3d4
450     temp = XGI_GetReg(XGI_Pr->P3d4,0x11);
451     XGI_SetRegOR(XGI_Pr->P3d4,0x11,0x80);
452     temp1 = XGI_GetReg(XGI_Pr->P3d4,0x00);
453     XGI_SetReg(XGI_Pr->P3d4,0x00,0x55);
454     temp2 = XGI_GetReg(XGI_Pr->P3d4,0x00);
455     XGI_SetReg(XGI_Pr->P3d4,0x00,temp1);
456     XGI_SetReg(XGI_Pr->P3d4,0x11,temp);
474     XGI_SetRegAND(XGI_Pr->P3d4, 0x53, 0xbf);
532   XGI_SetRegAND(XGI_Pr->P3d4,0x11,0x7f);		/* unlock cr0-7 */
543         XGI_SetReg(XGI_Pr->P3d4,j,XGI_Pr->XGINEWUB_CRT1Table[index].CR[i]);
546         XGI_SetReg(XGI_Pr->P3d4,j,XGI_Pr->XGINEWUB_CRT1Table[index].CR[i]);
549         XGI_SetReg(XGI_Pr->P3d4,j,XGI_Pr->XGINEWUB_CRT1Table[index].CR[i]);
560      XGI_SetRegANDOR(XGI_Pr->P3d4,0x09,0x5F,temp);
562   if(XGI_Pr->ModeType > ModeVGA) XGI_SetReg(XGI_Pr->P3d4,0x14,0x4F);
587    XGI_SetReg(XGI_Pr->P3d4,0x13,temp);
685     XGI_SetReg(XGI_Pr->P3d4,0x19,(data & 0xFF));
686     XGI_SetRegANDOR(XGI_Pr->P3d4,0x1a,0xFC,(data >> 8));
890    XGI_SetReg(XGI_Pr->P3d4,0x13,(HDisplay & 0xFF));
973         XGI_SetReg(XGI_Pr->P3d4,0x13,(HDisplay & 0xFF));
976         XGI_SetReg(XGI_Pr->P3d4,0x13,(HDisplay & 0xFF));
1024 	backupreg = XGI_GetReg(XGI_Pr->P3d4,0x38);
1042 	 backupcr30 = XGI_GetReg(XGI_Pr->P3d4,0x30);
1043 	 backupcr31 = XGI_GetReg(XGI_Pr->P3d4,0x31);
1044 	 backupcr35 = XGI_GetReg(XGI_Pr->P3d4,0x35);
1045 	 backupcr38 = XGI_GetReg(XGI_Pr->P3d4,0x38);
1053 	    XGI_SetReg(XGI_Pr->P3d4,0x30,pXGIEnt->CRT2CR30);
1054 	    XGI_SetReg(XGI_Pr->P3d4,0x31,pXGIEnt->CRT2CR31);
1055 	    XGI_SetReg(XGI_Pr->P3d4,0x35,pXGIEnt->CRT2CR35);
1056 	    XGI_SetReg(XGI_Pr->P3d4,0x38,pXGIEnt->CRT2CR38);
1059          XGI_SetReg(XGI_Pr->P3d4,0x30,backupcr30);
1060 	 XGI_SetReg(XGI_Pr->P3d4,0x31,backupcr31);
1061 	 XGI_SetReg(XGI_Pr->P3d4,0x35,backupcr35);
1062 	 XGI_SetReg(XGI_Pr->P3d4,0x38,backupcr38);