Lines Matching refs:Part1Port
3328 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1A, tempbx & 0x07);
3333 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x16,
3335 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x17,
3364 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x15, tempax);
3365 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x14,
3380 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1b,
3382 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1c,
3388 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1d,
3407 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x18,
3409 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x19, ~0x0f,
3421 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x1a, 0x07,
3440 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x37,
3442 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x36,
3452 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x35, tempax);
3493 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1f, tempax);
3504 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x20,
3506 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x21,
3514 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x22,
3516 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x23,
3590 temp = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x2e);
3594 tempax = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x13); /* Check ChannelA by Part1_13 [2003/10/03] */
4616 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x01, 0x40);
5122 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, temp);
5124 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x09, temp);
5126 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x03, temp);
5195 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x01, 0x3B); /* threshold high ,disable auto threshold */
5196 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x02, ~(0x3F), 0x04); /* threshold low default 04h */
5228 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, tempcx, 0x0);
5231 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x02, 0x44); /* temp 0206 */
5267 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, temp);
5269 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x09, ~0x0F0,
5272 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0A, temp);
5299 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0B, temp);
5303 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, temp);
5305 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x09, ~0x0F0,
5308 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0A, temp);
5333 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0B, temp);
5341 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0C, temp);
5343 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0D, temp);
5347 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0E, temp);
5350 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0F, temp);
5353 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x12, temp);
5381 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x10, temp);
5384 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x11, temp);
5393 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2C, ~0x0C0, tempax);
5427 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x03, temp);
5443 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x04, temp);
5466 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x05, temp); /* 0x05 Horizontal Display Start */
5467 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x06, 0x03); /* 0x06 Horizontal Blank end */
5545 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, temp); /* 0x07 Horizontal Retrace Start */
5546 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0); /* 0x08 Horizontal Retrace End */
5552 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, 0x5b);
5553 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0x03);
5558 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, 0x2A);
5559 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0x61);
5562 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, 0x2A);
5563 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0x41);
5564 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0C, 0xF0);
5570 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, 0x54);
5571 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0x00);
5574 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, 0x55);
5575 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0x00);
5576 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0C, 0xF0);
5583 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, 0x30);
5584 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0x03);
5587 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x07, 0x2f);
5588 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x08, 0x02);
5594 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x18, 0x03); /* 0x18 SR0B */
5595 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x19, 0xF0, 0x00);
5596 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x09, 0xFF); /* 0x09 Set Max VT */
5630 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x10, temp); /* 0x10 vertical Blank Start */
5634 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0E, temp);
5651 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0B, temp);
5657 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x11, 0x00); /* 0x11 Vertival Blank End */
5722 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0C, temp);
5725 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x10, temp);
5732 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x0B, 0x0FF, 0x20);
5752 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0D, temp); /* 0x0D vertical Retrace End */
5759 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0A, temp); /* 0x0A CR07 */
5761 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x17, temp); /* 0x17 SR0A */
5770 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x16, temp); /* 0x16 SR01 */
5771 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x0F, 0); /* 0x0F CR14 */
5772 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x12, 0); /* 0x12 CR17 */
5779 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1A, temp); /* 0x1A SR0E */
7637 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port , 0x26 , 0x00 , 0xFC ) ;
7650 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x26, 0x03, 0xFC);
8484 tempah = ~((USHORT) XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x2E));
8514 tempah = ~((USHORT) XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x2E));
8687 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1E, 0x20); /* Power on */
8691 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1E, 0x20); /* Power on */
8714 (UCHAR) XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port,
8718 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2E, 0x80); /* BVBDOENABLE = 1 */
8720 XGI_SetRegAND((XGIIOADDRESS) pVBInfo->Part1Port, 0x00, 0x7F); /* BScreenOFF = 0 */
8784 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x1E, 0x20); /* enable CRT2 */
8788 tempah = (UCHAR) XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x2E);
8790 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2E, 0x80); /* BVBDOENABLE = 1 */
8792 XGI_SetRegAND((XGIIOADDRESS) pVBInfo->Part1Port, 0x00, 0x7F);
8909 XGI_SetRegAND((XGIIOADDRESS) pVBInfo->Part1Port, 0x1e, 0xdf); /* Power down */
8922 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x00, 0x80); /* BScreenOff=1 */
8929 tempah = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x00); /* save Part1 index 0 */
8930 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x00, 0x10); /* BTDAC = 1, avoid VB reset */
8931 XGI_SetRegAND((XGIIOADDRESS) pVBInfo->Part1Port, 0x1E, 0xDF); /* disable CRT2 */
8932 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x00, tempah); /* restore Part1 index 0 */
8938 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x00, 0x80); /* BScreenOff=1 */
8939 XGI_SetRegAND((XGIIOADDRESS) pVBInfo->Part1Port, 0x1E, 0xDF); /* Disable CRT2 */
9096 tempah = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x2D);
9107 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x2D, tempah);
9120 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->Part1Port , 0x2D , 0x0f , tempah ) ;
9188 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x19, 0x0F, (USHORT) (0x20 | (tempcx & 0x00C0))); /* Enable Dither */
9189 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x1A, 0x7F, 0x80);
9192 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x19, 0x0F,
9194 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x1A, 0x7F, 0x00);
9200 XGI_SetRegANDOR((XGIIOADDRESS)pVBInfo->Part1Port,0x19, 0x0F,(USHORT)(0x30|(tempcx&0x00C0)) );
9201 XGI_SetRegANDOR((XGIIOADDRESS)pVBInfo->Part1Port,0x1A,0x7F,0x00);
9205 XGI_SetRegANDOR((XGIIOADDRESS)pVBInfo->Part1Port,0x19, 0x0F,(USHORT)(0x20|(tempcx&0x00C0)) );//Enable Dither
9206 XGI_SetRegANDOR((XGIIOADDRESS)pVBInfo->Part1Port,0x1A,0x7F,0x80);
9527 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port , 0x03 , 0x00 ) ; // fix write part1 index 0 BTDRAM bit Bug */
9530 tempah = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x00);
9557 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port , 0x00 , tempah ) ;
9584 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x00, tempah);
9589 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2e, tempbl,
9602 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2e,
9627 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2e,
9631 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2e,
9636 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2e, tempbl,
9698 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x13, tempbl,
9707 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2c, tempbl,
9844 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2f, 0xFF, 0x01);
9858 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port, 0x2F, 0xFE, 0x00);
10178 pVBInfo->Part1Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_04 ;