Lines Matching refs:Clock
116 * Find closest clock to given frequency (in kHz). This assumes the
124 int minimumGap = abs(freq - scrp->clock[0]);
132 /* Must set this here in case the best match is scrp->clock[0] */
138 gap = abs((freq * j) - ((scrp->clock[i] * DivFactor) / MulFactor));
191 return "no clock available for mode";
193 return "mode clock too high";
195 return "mode clock too low";
197 return "bad mode clock/interlace/doublescan";
244 * xf86ShowClockRanges() -- Print the clock ranges allowed
245 * and the clock values scaled by ClockMulFactor and ClockDivFactor
263 "Clock range: %6.2f to %6.2f MHz\n",
268 "Minimum clock: %6.2f MHz\n",
274 "Maximum clock: %6.2f MHz\n",
281 scaledClock = (scrp->clock[i] * DivFactor) / MulFactor;
300 return ((p->Clock >= cp->minClock) &&
301 (p->Clock <= cp->maxClock) &&
346 /* Check clock is in range */
356 clockIndex = xf86GetNearestClock(scrp, p->Clock, allowDiv2,
359 modep->Clock = (scrp->clock[clockIndex] * DivFactor)
362 modep->SynthClock = scrp->clock[clockIndex];
364 modep->Clock /= 2;
368 modep->Clock = p->Clock;
370 modep->SynthClock = (modep->Clock * MulFactor)
376 modep->Clock = p->Clock;
380 modep->Clock = p->Clock;
435 * clockRanges a list of clock ranges. This is optional when all the
444 * progClock clock is programmable
524 /* Check clock is in range */
538 * If programmable clock and strategy is not
565 * Clock is in range, so if it is not a programmable clock, find
566 * a matching clock.
569 i = xf86GetNearestClock(scrp, p->Clock, allowDiv2,
572 * If the clock is too far from the requested clock, this
576 gap = abs((p->Clock * 2) -
577 ((scrp->clock[i] * cp->ClockDivFactor) /
580 gap = abs(p->Clock -
581 ((scrp->clock[i] * cp->ClockDivFactor) /
638 modep->Clock = bestMode->Clock;
640 modep->SynthClock = (modep->Clock * MulFactor) / DivFactor;
642 modep->Clock = (scrp->clock[clockIndex] * DivFactor) /
645 modep->SynthClock = scrp->clock[clockIndex];
647 modep->Clock /= 2;
761 if ((monitor->maxPixClock) && (mode->Clock > monitor->maxPixClock))
928 * XXX The effect of clock dividers and multipliers on the monitor's
929 * pixel clock needs to be verified.
932 mode->SynthClock = mode->Clock;
934 i = xf86GetNearestClock(scrp, mode->Clock, allowDiv2,
937 mode->SynthClock = (scrp->clock[i] * cp->ClockDivFactor) /
983 * clockRanges allowable clock ranges
1028 /* Check clock is in range */
1037 * If programmable clock the required mode has been found
1044 /* Check clock is in range */
1048 * Clock is in range, so if it is not a programmable clock,
1049 * find a matching clock.
1052 i = xf86GetNearestClock(scrp, mode->Clock, 0,
1055 * If the clock is too far from the requested clock, this
1059 gap = abs((mode->Clock * 2) -
1060 ((scrp->clock[i] * cp->ClockDivFactor) /
1063 gap = abs(mode->Clock -
1064 ((scrp->clock[i] * cp->ClockDivFactor) /
1086 mode->SynthClock = (mode->Clock * MulFactor) / DivFactor;
1088 mode->Clock = (scrp->clock[clockIndex] * DivFactor) / MulFactor;
1090 mode->SynthClock = scrp->clock[clockIndex];
1092 mode->Clock /= 2;
1309 * clockRanges a list of clock ranges
1325 * progClock clock is programmable
1475 "%s: Using %smaximum pixel clock of %.2f MHz\n",
1584 /* Print clock ranges and scaled clocks */
2114 } else if (p->Clock == p->SynthClock) {
2117 uprefix, prefix, p->name, p->Clock / 1000.0,
2123 uprefix, prefix, p->name, p->Clock / 1000.0,
Indexes created Wed Jul 01 00:25:26 UTC 2026