Home | History | Annotate | Line # | Download | only in reset 
      1 /*	$NetBSD: altr,rst-mgr.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0-only */
      4 /*
      5  * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar (at) pengutronix.de>
      6  */
      7 
      8 #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
      9 #define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
     10 
     11 /* MPUMODRST */
     12 #define CPU0_RESET		0
     13 #define CPU1_RESET		1
     14 #define WDS_RESET		2
     15 #define SCUPER_RESET		3
     16 #define L2_RESET		4
     17 
     18 /* PERMODRST */
     19 #define EMAC0_RESET		32
     20 #define EMAC1_RESET		33
     21 #define USB0_RESET		34
     22 #define USB1_RESET		35
     23 #define NAND_RESET		36
     24 #define QSPI_RESET		37
     25 #define L4WD0_RESET		38
     26 #define L4WD1_RESET		39
     27 #define OSC1TIMER0_RESET	40
     28 #define OSC1TIMER1_RESET	41
     29 #define SPTIMER0_RESET		42
     30 #define SPTIMER1_RESET		43
     31 #define I2C0_RESET		44
     32 #define I2C1_RESET		45
     33 #define I2C2_RESET		46
     34 #define I2C3_RESET		47
     35 #define UART0_RESET		48
     36 #define UART1_RESET		49
     37 #define SPIM0_RESET		50
     38 #define SPIM1_RESET		51
     39 #define SPIS0_RESET		52
     40 #define SPIS1_RESET		53
     41 #define SDMMC_RESET		54
     42 #define CAN0_RESET		55
     43 #define CAN1_RESET		56
     44 #define GPIO0_RESET		57
     45 #define GPIO1_RESET		58
     46 #define GPIO2_RESET		59
     47 #define DMA_RESET		60
     48 #define SDR_RESET		61
     49 
     50 /* PER2MODRST */
     51 #define DMAIF0_RESET		64
     52 #define DMAIF1_RESET		65
     53 #define DMAIF2_RESET		66
     54 #define DMAIF3_RESET		67
     55 #define DMAIF4_RESET		68
     56 #define DMAIF5_RESET		69
     57 #define DMAIF6_RESET		70
     58 #define DMAIF7_RESET		71
     59 
     60 /* BRGMODRST */
     61 #define HPS2FPGA_RESET		96
     62 #define LWHPS2FPGA_RESET	97
     63 #define FPGA2HPS_RESET		98
     64 
     65 /* MISCMODRST*/
     66 #define ROM_RESET		128
     67 #define OCRAM_RESET		129
     68 #define SYSMGR_RESET		130
     69 #define SYSMGRCOLD_RESET	131
     70 #define FPGAMGR_RESET		132
     71 #define ACPIDMAP_RESET		133
     72 #define S2F_RESET		134
     73 #define S2FCOLD_RESET		135
     74 #define NRSTPIN_RESET		136
     75 #define TIMESTAMPCOLD_RESET	137
     76 #define CLKMGRCOLD_RESET	138
     77 #define SCANMGR_RESET		139
     78 #define FRZCTRLCOLD_RESET	140
     79 #define SYSDBG_RESET		141
     80 #define DBG_RESET		142
     81 #define TAPCOLD_RESET		143
     82 #define SDRCOLD_RESET		144
     83 
     84 #endif
     85