| /src/external/gpl3/binutils/dist/opcodes/ |
| arc-tbl.h | 650 { "add_s", 0x00004808, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R0_S, RB_S, UIMM6_13_S }, { 0 }},
653 { "add_s", 0x00004888, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R1_S, RB_S, UIMM6_13_S }, { 0 }},
6647 { "ei_s", 0x00005C00, 0x0000FC00, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, EI, CD2, { UIMM10_6_S }, { 0 }},
9134 { "ldi", 0x20260000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, RC, BRAKETdup }, { 0 }},
9137 { "ldi", 0x26267000, 0xFFFF7000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, RC, BRAKETdup }, { 0 }},
9140 { "ldi", 0x20660000, 0xF8FF003F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9143 { "ldi", 0x26667000, 0xFFFF703F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9146 { "ldi", 0x20E60020, 0xF8FF0020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9149 { "ldi", 0x26E67020, 0xFFFF7020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9152 { "ldi", 0x20A60000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, SIMM12_20, BRAKETdup }, { 0 }}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| arc-tbl.h | 650 { "add_s", 0x00004808, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R0_S, RB_S, UIMM6_13_S }, { 0 }},
653 { "add_s", 0x00004888, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R1_S, RB_S, UIMM6_13_S }, { 0 }},
6647 { "ei_s", 0x00005C00, 0x0000FC00, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, EI, CD2, { UIMM10_6_S }, { 0 }},
9134 { "ldi", 0x20260000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, RC, BRAKETdup }, { 0 }},
9137 { "ldi", 0x26267000, 0xFFFF7000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, RC, BRAKETdup }, { 0 }},
9140 { "ldi", 0x20660000, 0xF8FF003F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9143 { "ldi", 0x26667000, 0xFFFF703F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9146 { "ldi", 0x20E60020, 0xF8FF0020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9149 { "ldi", 0x26E67020, 0xFFFF7020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9152 { "ldi", 0x20A60000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, SIMM12_20, BRAKETdup }, { 0 }}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| arc-tbl.h | 650 { "add_s", 0x00004808, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R0_S, RB_S, UIMM6_13_S }, { 0 }},
653 { "add_s", 0x00004888, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R1_S, RB_S, UIMM6_13_S }, { 0 }},
6647 { "ei_s", 0x00005C00, 0x0000FC00, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, EI, CD2, { UIMM10_6_S }, { 0 }},
9134 { "ldi", 0x20260000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, RC, BRAKETdup }, { 0 }},
9137 { "ldi", 0x26267000, 0xFFFF7000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, RC, BRAKETdup }, { 0 }},
9140 { "ldi", 0x20660000, 0xF8FF003F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9143 { "ldi", 0x26667000, 0xFFFF703F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9146 { "ldi", 0x20E60020, 0xF8FF0020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9149 { "ldi", 0x26E67020, 0xFFFF7020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9152 { "ldi", 0x20A60000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, SIMM12_20, BRAKETdup }, { 0 }}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| arc-tbl.h | 650 { "add_s", 0x00004808, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R0_S, RB_S, UIMM6_13_S }, { 0 }},
653 { "add_s", 0x00004888, 0x0000F888, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, CD2, { R1_S, RB_S, UIMM6_13_S }, { 0 }},
6647 { "ei_s", 0x00005C00, 0x0000FC00, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, EI, CD2, { UIMM10_6_S }, { 0 }},
9134 { "ldi", 0x20260000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, RC, BRAKETdup }, { 0 }},
9137 { "ldi", 0x26267000, 0xFFFF7000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, RC, BRAKETdup }, { 0 }},
9140 { "ldi", 0x20660000, 0xF8FF003F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9143 { "ldi", 0x26667000, 0xFFFF703F, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { 0 }},
9146 { "ldi", 0x20E60020, 0xF8FF0020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { RB_CHK, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9149 { "ldi", 0x26E67020, 0xFFFF7020, ARC_OPCODE_ARCv2EM, LOAD, CD2, { ZA, BRAKET, UIMM6_20, BRAKETdup }, { C_CC }},
9152 { "ldi", 0x20A60000, 0xF8FF0000, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LOAD, CD2, { RB_CHK, BRAKET, SIMM12_20, BRAKETdup }, { 0 }}
[all...] |
| /src/external/gpl3/binutils/dist/include/opcode/ |
| arc.h | 98 CD2 = CD,
|
| /src/external/gpl3/binutils.old/dist/include/opcode/ |
| arc.h | 98 CD2 = CD,
|
| /src/external/gpl3/gdb/dist/include/opcode/ |
| arc.h | 98 CD2 = CD,
|
| /src/external/gpl3/gdb.old/dist/include/opcode/ |
| arc.h | 98 CD2 = CD,
|
