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    Searched defs:CHIP_W1_SYS_START (Results 1 - 25 of 46) sorted by relevancy

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  /src/sys/arch/algor/algor/
algor_p4032_bus_locio.c 61 #define CHIP_W1_SYS_START(v) 0
algor_p4032_bus_io.c 65 #define CHIP_W1_SYS_START(v) P4032_PCIIO
algor_p5064_bus_io.c 61 #define CHIP_W1_SYS_START(v) P5064_PCIIO
algor_p6032_bus_io.c 61 #define CHIP_W1_SYS_START(v) ((u_long)BONITO_PCIIO_BASE)
algor_p6032_bus_mem.c 66 #define CHIP_W1_SYS_START(v) ((u_long)BONITO_PCILO_BASE)
  /src/sys/arch/cobalt/dev/
gt_io_space.c 52 #define CHIP_W1_SYS_START(v) 0x10000000UL
gt_mem_space.c 52 #define CHIP_W1_SYS_START(v) 0x12000000UL
  /src/sys/arch/mips/adm5120/
adm5120_obio_space.c 81 #define CHIP_W1_SYS_START(v) 0UL
adm5120_pciio_space.c 51 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
adm5120_pcimem_space.c 51 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
  /src/sys/arch/mips/alchemy/
au_cpureg_mem.c 52 #define CHIP_W1_SYS_START(v) 0UL
  /src/sys/arch/mips/atheros/
arbusle.c 49 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
  /src/sys/arch/cobalt/cobalt/
bus.c 55 #define CHIP_W1_SYS_START(v) 0x10000000UL
  /src/sys/arch/evbmips/gdium/
gdium_bus_io.c 62 #define CHIP_W1_SYS_START(v) ((u_long)BONITO_PCIIO_BASE)
  /src/sys/arch/evbmips/malta/
malta_bus_io.c 53 #define CHIP_W1_SYS_START(v) ((u_long)MALTA_PCIMEM3_BASE)
  /src/sys/arch/evbmips/mipssim/
mipssim_bus_io.c 53 #define CHIP_W1_SYS_START(v) MIPSSIM_ISA_IO_BASE
54 #define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + CHIP_W1_BUS_END(v))
  /src/sys/arch/mips/rmi/
rmixl_iobus_space.c 66 #define CHIP_W1_SYS_START(v) (((struct rmixl_config *)(v))->rc_flash_pbase)
67 #define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + RMIXL_FLASH_BAR_MASK_MAX)
rmixl_obio_eb_space.c 59 #define CHIP_W1_SYS_START(v) (((struct rmixl_config *)(v))->rc_io_pbase)
60 #define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + RMIXL_IO_DEV_SIZE - 1)
rmixl_obio_el_space.c 59 #define CHIP_W1_SYS_START(v) (((struct rmixl_config *)(v))->rc_io_pbase)
60 #define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + RMIXL_IO_DEV_SIZE - 1)
rmixl_pci_cfg_space.c 60 (CHIP_W1_SYS_START(v) + \
62 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
rmixl_pci_ecfg_space.c 60 (CHIP_W1_SYS_START(v) + \
62 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
rmixl_pci_io_space.c 58 #define CHIP_W1_BUS_END(v) (CHIP_W1_SYS_START(v) + \
60 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
rmixl_pci_mem_space.c 58 #define CHIP_W1_BUS_END(v) (CHIP_W1_SYS_START(v) + \
60 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
  /src/sys/arch/mips/sibyte/pci/
sbbrz_bus_io.c 54 #define CHIP_W1_SYS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_START(v))
sbbrz_bus_mem.c 54 #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)

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