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    Searched defs:Control (Results 1 - 9 of 9) sorted by relevancy

  /src/usr.bin/xlint/lint1/
README.md 30 ## Control flow analysis
32 Lint roughly tracks the control flow inside a single function.
73 cannot reliably analyze the control flow in a single function.
74 * It does not store the control flow properties of functions, therefore it
  /src/sys/arch/emips/stand/common/
ace.c 125 { "Control",
240 SysacePrintRegister(&Control_Names, Interface->Control);
263 uint32_t BusMode, Control;
266 Interface->Control = SAC_RST;
274 Control = Interface->Control;
280 Interface->Control = Control | SAC_BUS16;
281 Interface->Control = Interface->Control & ~SAC_BUS8
    [all...]
  /src/sys/arch/emips/ebus/
ace_ebus.c 467 "Control",
592 SysacePrintRegister(&Control_Names, regs->Control);
623 uint32_t BusMode, Control;
626 regs->Control = SAC_RST;
634 Control = regs->Control;
639 regs->Control = Control | SAC_BUS16;
640 regs->Control = regs->Control & ~SAC_BUS8
    [all...]
  /src/sys/external/bsd/gnu-efi/dist/inc/
efi_pxe.h 929 PXE_CONTROL Control;
984 // microseconds before returning control to the UNDI.
999 // do not return control to the UNDI until the previous Block() is
  /src/sys/arch/emips/include/
emipsreg.h 102 * Preferred addresses (nb: for the control registers of...)
130 volatile uint32_t Control; /* rw */
161 volatile uint32_t Control; /* rw */
197 volatile uint32_t Control; /* rw */
380 volatile uint32_t Control; /* rw */
462 volatile uint32_t Control; /* rw */
494 volatile uint32_t Control; /* rw */
519 volatile uint32_t Control;
564 volatile uint32_t Control; /*0x00000004 */
584 /* volatile uint32_t Control; 0x00000004 *
    [all...]
  /src/sys/external/bsd/acpica/dist/include/
aclocal.h 836 * Control state - one per if/else and while constructs.
876 * states are created when there are nested control methods executing.
940 ACPI_CONTROL_STATE Control;
1213 * Parse state - one state per parser invocation and each control
1280 /* For control registers, both ignored and reserved bits must be preserved */
1283 * For PM1 control, the SCI enable bit (bit 0, SCI_EN) is defined by the
actbl1.h 365 /* 2: ASF Remote Control */
1355 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */
  /src/sys/dev/ic/
mfireg.h 1485 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
1493 #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30) /* Power Management Control */
1648 /* SCSI IO Control bits */
1742 uint32_t Control; /* 0x3C */
mpt_mpilib.h 2631 U32 Control; /* 14h */
2658 /* SCSIO Control bits */

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