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Searched defs:D33 (Results 1 - 8 of 8) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
micromips-opc.c	273 #define D33 ASE_DSPR2 1356 {"absq_s.qb", "t,s", 0x0000013c, 0xfc00ffff, WR_1\|RD_2, 0, 0, D33, 0 }, 1357 {"addqh.ph", "d,s,t", 0x0000004d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1358 {"addqh_r.ph", "d,s,t", 0x0000044d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1359 {"addqh.w", "d,s,t", 0x0000008d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1360 {"addqh_r.w", "d,s,t", 0x0000048d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1361 {"addu.ph", "d,s,t", 0x0000010d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1362 {"addu_s.ph", "d,s,t", 0x0000050d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1363 {"adduh.qb", "d,s,t", 0x0000014d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1364 {"adduh_r.qb", "d,s,t", 0x0000054d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]
mips-opc.c	388 #define D33 ASE_DSPR2 2361 {"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_1\|RD_2, 0, 0, D33, 0 }, 2362 {"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2363 {"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2364 {"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2365 {"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2366 {"append", "t,s,h", 0x7c000031, 0xfc0007ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2367 {"balign", "t,s,I", 0, (int) M_BALIGN, INSN_MACRO, 0, 0, D33, 0 }, 2368 {"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2369 {"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
micromips-opc.c	273 #define D33 ASE_DSPR2 1356 {"absq_s.qb", "t,s", 0x0000013c, 0xfc00ffff, WR_1\|RD_2, 0, 0, D33, 0 }, 1357 {"addqh.ph", "d,s,t", 0x0000004d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1358 {"addqh_r.ph", "d,s,t", 0x0000044d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1359 {"addqh.w", "d,s,t", 0x0000008d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1360 {"addqh_r.w", "d,s,t", 0x0000048d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1361 {"addu.ph", "d,s,t", 0x0000010d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1362 {"addu_s.ph", "d,s,t", 0x0000050d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1363 {"adduh.qb", "d,s,t", 0x0000014d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1364 {"adduh_r.qb", "d,s,t", 0x0000054d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]
mips-opc.c	388 #define D33 ASE_DSPR2 2361 {"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_1\|RD_2, 0, 0, D33, 0 }, 2362 {"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2363 {"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2364 {"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2365 {"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2366 {"append", "t,s,h", 0x7c000031, 0xfc0007ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2367 {"balign", "t,s,I", 0, (int) M_BALIGN, INSN_MACRO, 0, 0, D33, 0 }, 2368 {"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2369 {"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]
/src/external/gpl3/gdb/dist/opcodes/
micromips-opc.c	273 #define D33 ASE_DSPR2 1356 {"absq_s.qb", "t,s", 0x0000013c, 0xfc00ffff, WR_1\|RD_2, 0, 0, D33, 0 }, 1357 {"addqh.ph", "d,s,t", 0x0000004d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1358 {"addqh_r.ph", "d,s,t", 0x0000044d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1359 {"addqh.w", "d,s,t", 0x0000008d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1360 {"addqh_r.w", "d,s,t", 0x0000048d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1361 {"addu.ph", "d,s,t", 0x0000010d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1362 {"addu_s.ph", "d,s,t", 0x0000050d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1363 {"adduh.qb", "d,s,t", 0x0000014d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1364 {"adduh_r.qb", "d,s,t", 0x0000054d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]
mips-opc.c	388 #define D33 ASE_DSPR2 2361 {"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_1\|RD_2, 0, 0, D33, 0 }, 2362 {"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2363 {"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2364 {"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2365 {"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2366 {"append", "t,s,h", 0x7c000031, 0xfc0007ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2367 {"balign", "t,s,I", 0, (int) M_BALIGN, INSN_MACRO, 0, 0, D33, 0 }, 2368 {"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2369 {"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
micromips-opc.c	265 #define D33 ASE_DSPR2 1294 {"absq_s.qb", "t,s", 0x0000013c, 0xfc00ffff, WR_1\|RD_2, 0, 0, D33, 0 }, 1295 {"addqh.ph", "d,s,t", 0x0000004d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1296 {"addqh_r.ph", "d,s,t", 0x0000044d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1297 {"addqh.w", "d,s,t", 0x0000008d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1298 {"addqh_r.w", "d,s,t", 0x0000048d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1299 {"addu.ph", "d,s,t", 0x0000010d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1300 {"addu_s.ph", "d,s,t", 0x0000050d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1301 {"adduh.qb", "d,s,t", 0x0000014d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 1302 {"adduh_r.qb", "d,s,t", 0x0000054d, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]
mips-opc.c	387 #define D33 ASE_DSPR2 2356 {"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_1\|RD_2, 0, 0, D33, 0 }, 2357 {"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2358 {"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2359 {"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2360 {"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 }, 2361 {"append", "t,s,h", 0x7c000031, 0xfc0007ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2362 {"balign", "t,s,I", 0, (int) M_BALIGN, INSN_MACRO, 0, 0, D33, 0 }, 2363 {"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, MOD_1\|RD_2, 0, 0, D33, 0 }, 2364 {"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_1\|RD_2\|RD_3, 0, 0, D33, 0 } [all...]

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