1 /* 2 * Copyright (c) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997 3 * The Regents of the University of California. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that: (1) source code distributions 7 * retain the above copyright notice and this paragraph in its entirety, (2) 8 * distributions including binary code include the above copyright notice and 9 * this paragraph in its entirety in the documentation or other materials 10 * provided with the distribution, and (3) all advertising materials mentioning 11 * features or use of this software display the following acknowledgement: 12 * ``This product includes software developed by the University of California, 13 * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of 14 * the University nor the names of its contributors may be used to endorse 15 * or promote products derived from this software without specific prior 16 * written permission. 17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED 18 * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 20 */ 21 22 /* \summary: Marvell (Ethertype) Distributed Switch Architecture printer */ 23 24 #include <config.h> 25 26 #include "netdissect-stdinc.h" 27 28 #include "netdissect.h" 29 #include "ethertype.h" 30 #include "addrtoname.h" 31 #include "extract.h" 32 33 /* 34 * Format of (Ethertyped or not) DSA tagged frames: 35 * 36 * 7 6 5 4 3 2 1 0 37 * . . . . . . . . . 38 * 0 +---+---+---+---+---+---+---+---+ 39 * | Ether Destination Address | 40 * +6 +---+---+---+---+---+---+---+---+ 41 * | Ether Source Address | 42 * +6 +---+---+---+---+---+---+---+---+ +- 43 * | Prog. DSA Ether Type [15:8] | | (8-byte) EDSA Tag 44 * +1 +---+---+---+---+---+---+---+---+ | Contains a programmable Ether type, 45 * | Prog. DSA Ether Type [7:0] | | two reserved bytes (always 0), 46 * +1 +---+---+---+---+---+---+---+---+ | and a standard DSA tag. 47 * | Reserved (0x00 0x00) | | 48 * +2 +---+---+---+---+---+---+---+---+ | +- 49 * | Mode |b29| Src/Trg Dev | | | (4-byte) DSA Tag 50 * +1 +---+---+---+---+---+---+---+---+ | | Contains a DSA tag mode, 51 * |Src/Trg Port/Trunk |b18|b17|b16| | | source or target switch device, 52 * +1 +---+---+---+---+---+---+---+---+ | | source or target port or trunk, 53 * | PRI [2:0] |b12| VID [11:8] | | | and misc (IEEE and FPri) bits. 54 * +1 +---+---+---+---+---+---+---+---+ | | 55 * | VID [7:0] | | | 56 * +1 +---+---+---+---+---+---+---+---+ +- +- 57 * | Ether Length/Type | 58 * +2 +---+---+---+---+---+---+---+---+ 59 * . . . . . . . . . 60 * 61 * Mode: Forward, To_CPU, From_CPU, To_Sniffer 62 * b29: (Source or Target) IEEE Tag Mode 63 * b18: Forward's Src_Is_Trunk, To_CPU's Code[2], To_Sniffer's Rx_Sniff 64 * b17: To_CPU's Code[1] 65 * b16: Original frame's CFI 66 * b12: To_CPU's Code[0] 67 */ 68 69 #define TOK(tag, byte, mask, shift) ((GET_U_1(&(((const u_char *) tag)[byte])) & (mask)) >> (shift)) 70 71 #define DSA_LEN 4 72 #define DSA_MODE(tag) TOK(tag, 0, 0xc0, 6) 73 #define DSA_MODE_TO_CPU 0x0 74 #define DSA_MODE_FROM_CPU 0x1 75 #define DSA_MODE_TO_SNIFFER 0x2 76 #define DSA_MODE_FORWARD 0x3 77 #define DSA_TAGGED(tag) TOK(tag, 0, 0x20, 5) 78 #define DSA_DEV(tag) TOK(tag, 0, 0x1f, 0) 79 #define DSA_PORT(tag) TOK(tag, 1, 0xf8, 3) 80 #define DSA_TRUNK(tag) TOK(tag, 1, 0x04, 2) 81 #define DSA_RX_SNIFF(tag) TOK(tag, 1, 0x04, 2) 82 #define DSA_CFI(tag) TOK(tag, 1, 0x01, 0) 83 #define DSA_PRI(tag) TOK(tag, 2, 0xe0, 5) 84 #define DSA_VID(tag) ((u_short)((TOK(tag, 2, 0x0f, 0) << 8) | (TOK(tag, 3, 0xff, 0)))) 85 #define DSA_CODE(tag) ((TOK(tag, 1, 0x06, 1) << 1) | TOK(tag, 2, 0x10, 4)) 86 87 #define EDSA_LEN 8 88 89 static const struct tok dsa_mode_values[] = { 90 { DSA_MODE_TO_CPU, "To CPU" }, 91 { DSA_MODE_FROM_CPU, "From CPU" }, 92 { DSA_MODE_TO_SNIFFER, "To Sniffer"}, 93 { DSA_MODE_FORWARD, "Forward" }, 94 { 0, NULL } 95 }; 96 97 static const struct tok dsa_code_values[] = { 98 { 0x0, "BPDU (MGMT) Trap" }, 99 { 0x1, "Frame2Reg" }, 100 { 0x2, "IGMP/MLD Trap" }, 101 { 0x3, "Policy Trap" }, 102 { 0x4, "ARP Mirror" }, 103 { 0x5, "Policy Mirror" }, 104 { 0, NULL } 105 }; 106 107 static void 108 tag_common_print(netdissect_options *ndo, const u_char *p) 109 { 110 if (ndo->ndo_eflag) { 111 ND_PRINT("mode %s, ", tok2str(dsa_mode_values, "unknown", DSA_MODE(p))); 112 113 switch (DSA_MODE(p)) { 114 case DSA_MODE_FORWARD: 115 ND_PRINT("dev %u, %s %u, ", DSA_DEV(p), 116 DSA_TRUNK(p) ? "trunk" : "port", DSA_PORT(p)); 117 break; 118 case DSA_MODE_FROM_CPU: 119 ND_PRINT("target dev %u, port %u, ", 120 DSA_DEV(p), DSA_PORT(p)); 121 break; 122 case DSA_MODE_TO_CPU: 123 ND_PRINT("source dev %u, port %u, ", 124 DSA_DEV(p), DSA_PORT(p)); 125 ND_PRINT("code %s, ", 126 tok2str(dsa_code_values, "reserved", DSA_CODE(p))); 127 break; 128 case DSA_MODE_TO_SNIFFER: 129 ND_PRINT("source dev %u, port %u, ", 130 DSA_DEV(p), DSA_PORT(p)); 131 ND_PRINT("%s sniff, ", 132 DSA_RX_SNIFF(p) ? "ingress" : "egress"); 133 break; 134 default: 135 break; 136 } 137 138 ND_PRINT("%s, ", DSA_TAGGED(p) ? "tagged" : "untagged"); 139 ND_PRINT("%s", DSA_CFI(p) ? "CFI, " : ""); 140 ND_PRINT("VID %u, ", DSA_VID(p)); 141 ND_PRINT("FPri %u, ", DSA_PRI(p)); 142 } else { 143 switch (DSA_MODE(p)) { 144 case DSA_MODE_FORWARD: 145 ND_PRINT("Forward %s %u.%u, ", 146 DSA_TRUNK(p) ? "trunk" : "port", 147 DSA_DEV(p), DSA_PORT(p)); 148 break; 149 case DSA_MODE_FROM_CPU: 150 ND_PRINT("CPU > port %u.%u, ", 151 DSA_DEV(p), DSA_PORT(p)); 152 break; 153 case DSA_MODE_TO_CPU: 154 ND_PRINT("port %u.%u > CPU, ", 155 DSA_DEV(p), DSA_PORT(p)); 156 break; 157 case DSA_MODE_TO_SNIFFER: 158 ND_PRINT("port %u.%u > %s Sniffer, ", 159 DSA_DEV(p), DSA_PORT(p), 160 DSA_RX_SNIFF(p) ? "Rx" : "Tx"); 161 break; 162 default: 163 break; 164 } 165 166 ND_PRINT("VLAN %u%c, ", DSA_VID(p), DSA_TAGGED(p) ? 't' : 'u'); 167 } 168 } 169 170 static void 171 dsa_tag_print(netdissect_options *ndo, const u_char *bp) 172 { 173 if (ndo->ndo_eflag) 174 ND_PRINT("Marvell DSA "); 175 else 176 ND_PRINT("DSA "); 177 tag_common_print(ndo, bp); 178 } 179 180 static void 181 edsa_tag_print(netdissect_options *ndo, const u_char *bp) 182 { 183 const u_char *p = bp; 184 uint16_t edsa_etype; 185 186 edsa_etype = GET_BE_U_2(p); 187 if (ndo->ndo_eflag) { 188 ND_PRINT("Marvell EDSA ethertype 0x%04x (%s), ", edsa_etype, 189 tok2str(ethertype_values, "Unknown", edsa_etype)); 190 ND_PRINT("rsvd %u %u, ", GET_U_1(p + 2), GET_U_1(p + 3)); 191 } else 192 ND_PRINT("EDSA 0x%04x, ", edsa_etype); 193 p += 4; 194 tag_common_print(ndo, p); 195 } 196 197 void 198 dsa_if_print(netdissect_options *ndo, const struct pcap_pkthdr *h, const u_char *p) 199 { 200 u_int caplen = h->caplen; 201 u_int length = h->len; 202 203 ndo->ndo_protocol = "dsa"; 204 ndo->ndo_ll_hdr_len += 205 ether_switch_tag_print(ndo, p, length, caplen, dsa_tag_print, DSA_LEN); 206 } 207 208 void 209 edsa_if_print(netdissect_options *ndo, const struct pcap_pkthdr *h, const u_char *p) 210 { 211 u_int caplen = h->caplen; 212 u_int length = h->len; 213 214 ndo->ndo_protocol = "edsa"; 215 ndo->ndo_ll_hdr_len += 216 ether_switch_tag_print(ndo, p, length, caplen, edsa_tag_print, EDSA_LEN); 217 } 218
Indexes created Fri Jun 12 00:25:51 UTC 2026