| /src/sys/arch/sparc/sparc/ |
| db_trace.c | 47 #define ONINTSTACK(fr) ( \
48 (u_int)(fr) < (u_int)ddb_cpuinfo->eintstack && \
49 (u_int)(fr) >= (u_int)ddb_cpuinfo->eintstack - INT_STACK_SIZE \
52 #define ONINTSTACK(fr) (0)
141 #define FR(framep,field) (INKERNEL(framep) \
146 #define FR(framep,field) ((u_int)(framep)->field)
150 prevpc = (db_addr_t)FR(frame, fr_pc);
151 prevframe = (struct frame *)FR(frame, fr_fp);
162 prevpc = (db_addr_t)FR(frame, fr_local[1]);
178 (*pr)("0x%x%s", FR(frame, fr_arg[i])
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/UninitializedObject/ |
| UninitializedObject.h | 87 const FieldRegion *FR;
94 FieldNode(const FieldRegion *FR) : FR(FR) {}
111 if (FR == nullptr)
114 return FR == OtherFR;
117 const FieldRegion *getRegion() const { return FR; }
119 assert(FR);
120 return FR->getDecl();
138 /// Print the node. Should contain the name of the field stored in FR
[all...] |
| UninitializedObjectChecker.cpp | 58 RegularField(const FieldRegion *FR) : FieldNode(FR) {}
244 const FieldRegion *FR = Chain.getUninitRegion();
246 assert((PointeeR || !isDereferencableType(FR->getDecl()->getType())) &&
251 FR->getDecl()->getLocation()))
254 if (Opts.IgnoreGuardedFields && !hasUnguardedAccess(FR->getDecl(), State))
257 if (State->contains<AnalyzedRegions>(FR))
267 State = State->add<AnalyzedRegions>(FR);
273 return UninitFields.insert({FR, std::move(NoteMsgBuf)}).second;
302 const auto *FR = FieldVal.getRegionAs<FieldRegion>()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| RDFCopy.cpp | 146 auto FR = EM.find(DR);
147 if (FR == EM.end())
149 RegisterRef SR = FR->second;
|
| HexagonEarlyIfConv.cpp | 204 unsigned TSR, unsigned FR, unsigned FSR);
779 unsigned PredR, unsigned TR, unsigned TSR, unsigned FR, unsigned FSR) {
806 .addReg(FR, 0, FSR);
818 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0;
826 FR = RO.getReg(), FSR = RO.getSubReg();
834 else if (FR == 0)
835 FR = SR, FSR = SSR;
837 assert(TR || FR);
840 if (TR && FR) {
844 FP.PredR, TR, TSR, FR, FSR)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| LocalStackSlotAllocation.cpp | 348 FrameRef &FR = FrameReferenceInsns[ref];
349 MachineInstr &MI = *FR.getMachineInstr();
350 int64_t LocalOffset = FR.getLocalOffset();
351 int FrameIdx = FR.getFrameIndex();
|
| /src/sys/arch/powerpc/fpu/ |
| fpu_emu.c | 162 #define FR(reg) (fs->fpreg[reg])
479 word = fpu_to_single(FR(rt));
485 kaddr = &FR(rt);
496 if (copyin((const void *)addr, &FR(rt), size)) {
501 fpu_explode(fe, fp = &fe->fe_f1, type, FR(rt));
502 fpu_implode(fe, fp, FTYPE_DBL, &FR(rt));
527 fpu_explode(fe, &fe->fe_f1, type, FR(ra));
528 fpu_explode(fe, &fe->fe_f2, type, FR(rb));
549 FR(rb));
550 fpu_implode(fe, fp, FTYPE_SNG, &FR(rt))
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| amdgpu_dce_stream_encoder.c | 1077 * FR - Front Right
1090 * FL FR
1101 * 0b00000011 - - - - - - FR FL
1102 * 0b00000111 - - - - - LFE FR FL
1103 * 0b00001011 - - - - FC - FR FL
1104 * 0b00001111 - - - - FC LFE FR FL
1105 * 0b00010011 - - - RC - - FR FL
1106 * 0b00010111 - - - RC - LFE FR FL
1107 * 0b00011011 - - - RC FC - FR FL
1108 * 0b00011111 - - - RC FC LFE FR F
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_stream_encoder.c | 1036 * FR - Front Right
1049 * FL FR
1060 * 0b00000011 - - - - - - FR FL
1061 * 0b00000111 - - - - - LFE FR FL
1062 * 0b00001011 - - - - FC - FR FL
1063 * 0b00001111 - - - - FC LFE FR FL
1064 * 0b00010011 - - - RC - - FR FL
1065 * 0b00010111 - - - RC - LFE FR FL
1066 * 0b00011011 - - - RC FC - FR FL
1067 * 0b00011111 - - - RC FC LFE FR F
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| CallAndMessageChecker.cpp | 259 const FieldRegion *FR = MrMgr.getFieldRegion(I, R);
263 if (Find(FR))
266 const SVal &V = StoreMgr.getBinding(store, loc::MemRegionVal(FR));
|
| MallocChecker.cpp | 2622 FreeReturnValueTy FR = state->get<FreeReturnValue>();
2623 for (FreeReturnValueTy::iterator I = FR.begin(), E = FR.end(); I != E; ++I) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCISelLowering.cpp | 742 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
744 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
|
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/ |
| MemRegion.cpp | 713 const auto *const FR = dyn_cast<FieldRegion>(this);
717 if (FR) {
718 return FR->getDecl()->getSourceRange();
1535 const auto *FR = cast<FieldRegion>(R);
1536 R = FR->getSuperRegion();
1539 const RecordDecl *RD = FR->getDecl()->getParent();
1558 if (FR->getDecl() == *FI)
|
| BugReporterVisitors.cpp | 537 const FieldRegion *FR = MmrMgr.getFieldRegion(I, cast<SubRegion>(R));
538 const SVal V = State->getSVal(FR);
542 VecF.push_back(FR);
549 findRegionOfInterestInRecord(RRD, State, FR, VecF, depth + 1))
|
| RegionStore.cpp | 807 static inline bool isUnionField(const FieldRegion *FR) {
808 return FR->getDecl()->getParent()->isUnion();
820 if (const FieldRegion *FR = dyn_cast<FieldRegion>(R))
821 if (!isUnionField(FR))
822 Fields.push_back(FR->getDecl());
877 } else if (const FieldRegion *FR = dyn_cast<FieldRegion>(Top)) {
878 if (FR->getDecl()->isBitField())
879 Length = FR->getDecl()->getBitWidthValue(SVB.getContext());
1480 if (const FieldRegion* FR = dyn_cast<FieldRegion>(R))
1481 return svalBuilder.evalCast(getBindingForField(B, FR), T, QualType{})
[all...] |
| BugReporter.cpp | 1048 const auto *FR = cast<CXXForRangeStmt>(Term);
1049 if (isContainedByStmt(PM, FR->getInc(), S))
1051 if (isContainedByStmt(PM, FR->getLoopVarStmt(), S))
1053 LoopBody = FR->getBody();
|
| /src/external/apache2/llvm/dist/clang/lib/Sema/ |
| Sema.cpp | 2222 OverloadExpr::FindResult FR = OverloadExpr::find(const_cast<Expr*>(&E));
2225 if (FR.HasFormOfMemberPointer)
2228 Overloads = FR.Expression;
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/ProfileData/Coverage/ |
| CoverageMapping.h | 362 FunctionRecord(FunctionRecord &&FR) = default;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUCodeGenPrepare.cpp | 917 // float fr = mad(fqneg, fb, fa);
921 Value *FR = Builder.CreateIntrinsic(FMAD,
928 // fr = fabs(fr);
929 FR = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, FR, FQ);
934 // int cv = fr >= fb;
935 Value *CV = Builder.CreateFCmpOGE(FR, FB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kISelLowering.cpp | 3178 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
3179 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
|
| /src/external/gpl3/gdb.old/dist/sim/sh/ |
| interp.c | 408 #define FR(n) (saved_state.asregs.fregs[0].f[(n)])
450 SET_FR (n, (FR (n) OP FR (m))); \
463 SET_FR (n, (OP (FR (n)))); \
476 SET_SR_T (FR (n) OP FR (m)); \
|
| /src/external/gpl3/gdb/dist/sim/sh/ |
| interp.c | 408 #define FR(n) (saved_state.asregs.fregs[0].f[(n)])
450 SET_FR (n, (FR (n) OP FR (m))); \
463 SET_FR (n, (OP (FR (n)))); \
476 SET_SR_T (FR (n) OP FR (m)); \
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 3732 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
3734 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
3766 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
3802 return DAG.getStore(thirdStore, dl, FR, nextPtr,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 7303 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsStackIndex(),
7305 FR = DAG.getZExtOrTrunc(FR, DL, getPointerMemTy(DAG.getDataLayout()));
7307 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
7317 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsGPRSize() > 0
7322 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 4087 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
4089 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
|
