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    Searched defs:F_28 (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c	99 #define F_28 (F_24 + 1) /* FPR starting at position 28 */ 101 #define F_32 (F_28 + 1) /* FPR starting at position 32 */ 348 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */ 349 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */ 354 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */ 361 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */ 362 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */ 363 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */ 366 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */ 368 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra *     [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c	99 #define F_28 (F_24 + 1) /* FPR starting at position 28 */ 101 #define F_32 (F_28 + 1) /* FPR starting at position 32 */ 348 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */ 349 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */ 354 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */ 361 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */ 362 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */ 363 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */ 366 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */ 368 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra *     [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c	99 #define F_28 (F_24 + 1) /* FPR starting at position 28 */ 101 #define F_32 (F_28 + 1) /* FPR starting at position 32 */ 348 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */ 349 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */ 354 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */ 361 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */ 362 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */ 363 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */ 366 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */ 368 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra *     [all...]
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c	99 #define F_28 (F_24 + 1) /* FPR starting at position 28 */ 101 #define F_32 (F_28 + 1) /* FPR starting at position 32 */ 348 #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */ 349 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */ 354 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */ 361 #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */ 362 #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */ 363 #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */ 366 #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */ 368 #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra *     [all...]

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Indexes created Thu Jul 16 00:26:27 UTC 2026