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/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c	91 #define F_8 (RE_32 + 1) /* FPR starting at position 8 */ 93 #define F_12 (F_8 + 1) /* FPR starting at position 12 */ 399 #define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */ 401 #define INSTR_RR_FFE 2, { F_8,FE_12,0,0,0,0 } /* e.g. ldxr */ 434 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. adb */ 439 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } /* e.g. madb */ 440 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } /* e.g. my */ 445 #define INSTR_RXY_FRRD 6, { F_8,D20_20,X_12,B_16,0,0 } /* e.g. ley */ 449 #define INSTR_RX_FRRD 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c	91 #define F_8 (RE_32 + 1) /* FPR starting at position 8 */ 93 #define F_12 (F_8 + 1) /* FPR starting at position 12 */ 399 #define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */ 401 #define INSTR_RR_FFE 2, { F_8,FE_12,0,0,0,0 } /* e.g. ldxr */ 434 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. adb */ 439 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } /* e.g. madb */ 440 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } /* e.g. my */ 445 #define INSTR_RXY_FRRD 6, { F_8,D20_20,X_12,B_16,0,0 } /* e.g. ley */ 449 #define INSTR_RX_FRRD 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */
/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c	91 #define F_8 (RE_32 + 1) /* FPR starting at position 8 */ 93 #define F_12 (F_8 + 1) /* FPR starting at position 12 */ 399 #define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */ 401 #define INSTR_RR_FFE 2, { F_8,FE_12,0,0,0,0 } /* e.g. ldxr */ 434 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. adb */ 439 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } /* e.g. madb */ 440 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } /* e.g. my */ 445 #define INSTR_RXY_FRRD 6, { F_8,D20_20,X_12,B_16,0,0 } /* e.g. ley */ 449 #define INSTR_RX_FRRD 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c	91 #define F_8 (RE_32 + 1) /* FPR starting at position 8 */ 93 #define F_12 (F_8 + 1) /* FPR starting at position 12 */ 399 #define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */ 401 #define INSTR_RR_FFE 2, { F_8,FE_12,0,0,0,0 } /* e.g. ldxr */ 434 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. adb */ 439 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } /* e.g. madb */ 440 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } /* e.g. my */ 445 #define INSTR_RXY_FRRD 6, { F_8,D20_20,X_12,B_16,0,0 } /* e.g. ley */ 449 #define INSTR_RX_FRRD 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */

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Indexes created Thu Jul 16 00:26:27 UTC 2026