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  /src/external/apache2/llvm/dist/clang/include/clang/Sema/
CXXFieldCollector.h 26 /// Fields - Contains all FieldDecls collected during parsing of a C++
27 /// class. When a nested class is entered, its fields are appended to the
28 /// fields of its parent class, when it is exited its fields are removed.
29 SmallVector<FieldDecl*, 32> Fields;
31 /// FieldCount - Each entry represents the number of fields collected during
42 // // At this point, Fields contains [x,y,q] decls and FieldCount contains
46 // // At this point, Fields contains [x,y,z] decls and FieldCount contains
56 Fields.push_back(D);
60 /// getCurNumField - The number of fields added to the currently parsed class
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  /src/external/apache2/llvm/dist/llvm/include/llvm/ObjectYAML/
ArchiveYAML.h 36 Fields["Name"] = {"", 16};
37 Fields["LastModified"] = {"0", 12};
38 Fields["UID"] = {"0", 6};
39 Fields["GID"] = {"0", 6};
40 Fields["AccessMode"] = {"0", 8};
41 Fields["Size"] = {"0", 10};
42 Fields["Terminator"] = {"`\n", 2};
45 MapVector<StringRef, Field> Fields;
  /src/external/apache2/llvm/dist/clang/lib/AST/Interp/
Record.h 64 llvm::iterator_range<const_field_iter> fields() const { function in class:clang::interp::Record
65 return llvm::make_range(Fields.begin(), Fields.end());
68 unsigned getNumFields() { return Fields.size(); }
69 Field *getField(unsigned I) { return &Fields[I]; }
89 Record(const RecordDecl *, BaseList &&Bases, FieldList &&Fields,
100 /// List of all the fields in the record.
101 FieldList Fields;
Program.cpp 219 // Number of bytes required by fields and base classes.
266 // Reserve space for fields.
267 Record::FieldList Fields;
268 for (const FieldDecl *FD : RD->fields()) {
286 Fields.push_back({FD, Size, Desc});
290 Record *R = new (Allocator) Record(RD, std::move(Bases), std::move(Fields),
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CodeGenTBAA.cpp 279 Fields,
303 if (!CollectFields(Offset, FieldQTy, Fields,
315 Fields.push_back(llvm::MDBuilder::TBAAStructField(Offset, Size, TBAATag));
326 SmallVector<llvm::MDBuilder::TBAAStructField, 4> Fields;
327 if (CollectFields(0, QTy, Fields, TypeHasMayAlias(QTy)))
328 return MDHelper.createTBAAStructNode(Fields);
338 SmallVector<llvm::MDBuilder::TBAAStructField, 4> Fields;
339 for (FieldDecl *Field : RD->fields()) {
351 Fields.push_back(llvm::MDBuilder::TBAAStructField(Offset, Size,
368 return MDHelper.createTBAATypeNode(Parent, Size, Id, Fields);
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CGRecordLayoutBuilder.cpp 53 /// fields. The existing asserts suggest that LLVM assumes that *every* field
58 /// code to access fields. Bitfields in tail position with tail padding may
104 /// fields of the same formal type. We want to emit a layout with
206 // Input memoization fields.
215 // Output fields, consumed by CodeGenTypes::ComputeRecordLayout.
217 llvm::DenseMap<const FieldDecl *, unsigned> Fields;
263 // 1) Store all members (fields and bases) in a list and sort them by offset.
315 // Iterate through the fields setting bitFieldInfo and the Fields array. Also
320 for (const auto *Field : D->fields()) {
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CGCall.cpp 851 // Record fields are expanded recursively (but if record is a union, only
880 SmallVector<const FieldDecl *, 1> Fields;
883 SmallVector<const FieldDecl *, 1> &&Fields)
885 Fields(std::move(Fields)) {}
916 SmallVector<const FieldDecl *, 1> Fields;
921 // Unions can be here only in degenerative cases - all the fields are same
926 for (const auto *FD : RD->fields()) {
938 Fields.push_back(LargestFD);
947 for (const auto *FD : RD->fields()) {
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CGClass.cpp 117 // under-aligned and then safely access its fields and vtables.
793 // Populate sizes and offsets of fields.
800 for (const auto *Field : ClassDecl->fields()) {
926 // Never memcpy fields when we are adding poisoned paddings.
1029 "Cannot aggregate fields out of order.");
1032 // The 'first' and 'last' fields are chosen by offset, rather than field
1034 // fields.
1081 // Bail out on volatile fields.
1372 // Check fields.
1373 for (const auto *Field : BaseClassDecl->fields())
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CGObjCGNU.cpp 242 /// Push the property attributes into two structure fields.
243 void PushPropertyAttributes(ConstantStructBuilder &Fields,
255 Fields.addInt(Int8Ty, attrs & 0xff);
263 // The second field is the next four fields left shifted by two, with the
265 Fields.addInt(Int8Ty, attrs & 0xff);
266 // Two padding fields
267 Fields.addInt(Int8Ty, 0);
268 Fields.addInt(Int8Ty, 0);
273 virtual ConstantArrayBuilder PushPropertyListHeader(ConstantStructBuilder &Fields,
276 Fields.addInt(IntTy, count)
2456 auto fields = builder.beginStruct(); local
3231 auto fields = builder.beginStruct(); local
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CodeGenModule.cpp 2550 llvm::Constant *Fields[] = {
2557 return llvm::ConstantStruct::getAnon(Fields);
2750 llvm::Constant *Fields[4] = {
2757 Init = llvm::ConstantStruct::getAnon(Fields);
4560 for (const FieldDecl *FD : RD->fields()) {
5121 auto Fields = Builder.beginStruct(STy);
5124 Fields.add(cast<llvm::ConstantExpr>(CFConstantStringClassRef));
5128 Fields.addInt(IntPtrTy, IsSwift4_1 ? 0x05 : 0x01);
5129 Fields.addInt(Int64Ty, isUTF16 ? 0x07d0 : 0x07c8);
5131 Fields.addInt(IntTy, isUTF16 ? 0x07d0 : 0x07C8)
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ItaniumCXXABI.cpp 3046 /// Fields - The fields of the RTTI descriptor currently being built.
3047 SmallVector<llvm::Constant *, 16> Fields;
3590 Fields.push_back(VTable);
3723 Fields.push_back(TypeNameField);
3781 // We don't need to emit any fields.
3811 // No fields, at least for the moment.
3815 llvm::Constant *Init = llvm::ConstantStruct::getAnon(Fields);
3894 // extra fields.
3908 Fields.push_back(BaseTypeInfo)
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  /src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/JITLink/
EHFrameSupportImpl.h 53 uint8_t Fields[4] = {0x0, 0x0, 0x0, 0x0};
  /src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/
WasmEmitter.cpp 304 int Fields = int(!Section.Languages.empty()) + int(!Section.Tools.empty()) +
306 if (Fields == 0)
308 encodeULEB128(Fields, OS);
  /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/
PaddingChecker.cpp 81 // This is the simplest correct case: a class with no fields and one base
83 // & fields might interact, so we don't bother dealing with them.
84 // TODO: Support other combinations of base classes and fields.
127 // TODO: Recurse into the fields to see if they have excess padding.
153 // have fields.
169 // How do you reorder fields if you haven't got any?
195 for (const FieldDecl *FD : RD->fields()) {
199 // total because reordering fields won't fix that problem.
217 /// 3. If no fields can fit, pad by rounding the current offset up to the
218 /// smallest alignment requirement of our fields. Measure and track th
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  /src/external/apache2/llvm/dist/llvm/tools/llvm-profgen/
PerfReader.cpp 598 SmallVector<StringRef, 6> Fields;
599 bool R = RegMmap2.match(TraceIt.getCurrentLine(), &Fields);
607 Fields[PID].getAsInteger(10, Event.PID);
608 Fields[BASE_ADDRESS].getAsInteger(0, Event.BaseAddress);
609 Fields[MMAPPED_SIZE].getAsInteger(0, Event.Size);
610 Fields[PAGE_OFFSET].getAsInteger(0, Event.Offset);
611 Event.BinaryPath = Fields[BINARY_PATH];
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
SearchableTableEmitter.cpp 9 // This tablegen backend emits a generic array initialized by specified fields,
68 SmallVector<GenericField, 1> Fields;
77 SmallVector<GenericField, 2> Fields;
84 for (const auto &Field : Fields) {
210 assert(Index.Fields.size() == 1);
212 if (Index.Fields[0].Enum) {
213 Record *EnumEntry = Rec->getValueAsDef(Index.Fields[0].Name);
214 return Index.Fields[0].Enum->EntryMap[EnumEntry]->second;
217 return getInt(Rec, Index.Fields[0].Name);
224 for (const auto &Field : Index.Fields) {
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FixedLenDecoderEmitter.cpp 65 std::vector<EncodingField> Fields;
74 Fields.push_back(EncodingField(Base, Width, Offset));
77 unsigned numFields() const { return Fields.size(); }
81 const_iterator begin() const { return Fields.begin(); }
82 const_iterator end() const { return Fields.end(); }
976 // TODO: When InsnType is large, using uint64_t limits all fields to 64 bits
978 // possible but fall back to an InsnType-sized tmp for truly large fields.
1388 // Check any additional encoding fields needed.
1893 // Ignore fixed fields in the record, we're looking for values like:
2154 OS << "// Helper functions for extracting fields from encoded instructions.\n
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  /src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/
SymbolRecord.h 667 std::vector<StringRef> Fields;
  /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/
RegionStore.cpp 363 /// The largest number of fields a struct can have and still be
485 /// Attempt to extract the fields of \p LCV and bind them to the struct region
813 static void getSymbolicOffsetFields(BindingKey K, FieldVector &Fields) {
822 Fields.push_back(FR->getDecl());
828 static bool isCompatibleWithFields(BindingKey K, const FieldVector &Fields) {
831 if (Fields.empty())
837 ptrdiff_t Delta = FieldsInBindingKey.size() - Fields.size();
841 Fields.begin());
844 Fields.begin() - Delta);
1905 // with a symbolic offset, but also fields within an element wit
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  /src/external/apache2/llvm/dist/llvm/lib/Object/
WasmObjectFile.cpp 778 uint32_t Fields = readVaruint32(Ctx);
779 for (size_t I = 0; I < Fields; ++I) {
783 "producers section does not have unique fields",
1435 // The rest of these Data fields are set later, when reading in the linking
  /src/external/apache2/llvm/dist/llvm/lib/Support/
VirtualFileSystem.cpp 1457 KeyStatusPair Fields[] = {
1465 DenseMap<StringRef, KeyStatus> Keys(std::begin(Fields), std::end(Fields));
1662 KeyStatusPair Fields[] = {
1671 DenseMap<StringRef, KeyStatus> Keys(std::begin(Fields), std::end(Fields));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 2897 // Inspects a register string of the form o0:op1:CRn:CRm:op2 gets the fields
2901 SmallVector<StringRef, 5> Fields;
2902 RegString.split(Fields, ':');
2904 if (Fields.size() == 1)
2907 assert(Fields.size() == 5
2908 && "Invalid number of fields in read register string");
2913 for (StringRef Field : Fields) {
2922 // Need to combine the integer fields of the string into a single value
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Coroutines/
CoroFrame.cpp 432 SmallVector<Field, 8> Fields;
489 assert(!IsFinished && "adding fields to a finished builder");
506 // Lay out header fields immediately.
517 Fields.push_back({FieldSize, Offset, Ty, 0, *FieldAlignment, TyAlignment});
518 return Fields.size() - 1;
536 return Fields[Id].LayoutFieldIndex;
541 return Fields[Id];
700 LayoutFields.reserve(Fields.size());
701 for (auto &Field : Fields) {
757 for (auto &F : Fields) {
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  /src/external/apache2/llvm/dist/clang/lib/Parse/
ParseDecl.cpp 4340 SmallVector<Decl *, 16> Fields;
4342 Tok.getIdentifierInfo(), Fields);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp 5112 // cp<coprocessor>:<opc1>:c<CRm> (64bit) inspect the fields of the string
5119 SmallVector<StringRef, 5> Fields;
5120 RegString.split(Fields, ':');
5122 if (Fields.size() > 1) {
5125 for (StringRef Field : Fields) {
5176 // bits 3-0 contains the fields to be accessed in the special register, set by
5244 // If the special register string was constructed of fields (as defined
5255 "Invalid number of fields in special register string.");
5359 // If the special register string was constructed of fields (as defined
5369 "Invalid number of fields in special register string.")
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