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    Searched defs:FirstMI (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
VirtRegMap.cpp 444 MachineInstr *FirstMI = MIs.back();
474 MachineInstr *BundleStart = FirstMI;
487 if (Indexes && BundledMI != FirstMI)
ModuloSchedule.cpp 1300 MachineInstr *FirstMI = nullptr;
1307 if (!FirstMI)
1308 FirstMI = MI;
1310 assert(FirstMI && "Failed to find first MI in schedule");
1312 // At this point all of the scheduled instructions are between FirstMI
1313 // and the end of the block. Kill from the first non-phi to FirstMI.
1314 for (auto I = BB->getFirstNonPHI(); I != FirstMI->getIterator();) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SILowerControlFlow.cpp 658 MachineInstr *FirstMI = &*MBB->begin();
663 if (DefInstr != FirstMI) {
667 MBB->insert(FirstMI, DefInstr);
672 FirstMI = &*std::next(FirstMI->getIterator());
682 auto BfeMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_BFE_U32), CountReg)
686 BuildMI(*MBB, FirstMI, DL,
690 auto CmpMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_CMP_EQ_U32))
694 BuildMI(*MBB, FirstMI, DL,
SIInstrInfo.cpp 609 MachineInstr *FirstMI = nullptr, *LastMI = nullptr;
632 if (!FirstMI)
633 FirstMI = LastMI;
639 assert(FirstMI && LastMI);
641 std::swap(FirstMI, LastMI);
643 FirstMI->addOperand(
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMLoadStoreOptimizer.cpp 1003 const MachineInstr *FirstMI = MemOps[0].MI;
1004 unsigned Opcode = FirstMI->getOpcode();
1006 unsigned Size = getLSMultipleTransferSize(FirstMI);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 7116 MachineInstr *FirstMI = Selects.front();
7117 unsigned CCValid = FirstMI->getOperand(3).getImm();
7118 unsigned CCMask = FirstMI->getOperand(4).getImm();

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