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    Searched defs:HHI_MPLL_CNTL9 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/amlogic/
mesongxbb_clkc.c	59 #define HHI_MPLL_CNTL9 CBUS_REG(0xa8) 149 MESON_CLK_GATE(MESONGXBB_CLOCK_MPLL2, "mpll2", "mpll2_div", HHI_MPLL_CNTL9, 14),
meson8b_clkc.c	66 #define HHI_MPLL_CNTL9 CBUS_REG(0xa8) 271 MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BITS(13,0)), /* sdm */ 272 MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BIT(15)), /* sdm_enable */ 273 MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BITS(24,16)), /* n2 */ 279 MESON_CLK_GATE(MESON8B_CLOCK_MPLL2, "mpll2", "mpll2_div", HHI_MPLL_CNTL9, 14),

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