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    Searched defs:HHI_SYS_CPU_CLK_CNTL0 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/arch/arm/amlogic/
meson8b_clkc.c 56 #define HHI_SYS_CPU_CLK_CNTL0 CBUS_REG(0x67)
86 MESON_CLK_RESET(MESON8B_RESET_CPU0_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 24),
87 MESON_CLK_RESET(MESON8B_RESET_CPU1_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 25),
88 MESON_CLK_RESET(MESON8B_RESET_CPU2_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 26),
89 MESON_CLK_RESET(MESON8B_RESET_CPU3_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 27),
122 uint32_t cntl0 = CLK_READ(sc, HHI_SYS_CPU_CLK_CNTL0);
159 CLK_WRITE(sc, HHI_SYS_CPU_CLK_CNTL0, cntl0);
169 CLK_WRITE(sc, HHI_SYS_CPU_CLK_CNTL0, cntl0);
200 HHI_SYS_CPU_CLK_CNTL0, /* reg */
213 HHI_SYS_CPU_CLK_CNTL0, /* reg *
    [all...]
mesong12_clkc.c 129 #define HHI_SYS_CPU_CLK_CNTL0 CBUS_REG(0x67)
778 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
784 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
790 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
796 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
802 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
808 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
814 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
820 HHI_SYS_CPU_CLK_CNTL0, /* reg */ \
828 HHI_SYS_CPU_CLK_CNTL0, /* reg */
    [all...]

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