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    Searched defs:I5 (Results 1 - 11 of 11) sorted by relevancy

  /src/external/gpl3/gdb/dist/gdb/stubs/
sparc-stub.c 113 I0, I1, I2, I3, I4, I5, FP, I7,
  /src/external/gpl3/gdb.old/dist/gdb/stubs/
sparc-stub.c 113 I0, I1, I2, I3, I4, I5, FP, I7,
  /src/external/bsd/pcc/dist/pcc/arch/sparc64/
macdefs.h 149 #define I5 28
  /src/external/gpl3/binutils/dist/opcodes/
mips-opc.c 285 #define I5 INSN_ISA5
v850-opc.c 1116 #define I5 (D4U + 1)
1120 #define I5DIV1 (I5 + 1)
1290 #define IF2 {I5, R2}
1455 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 },
1624 { "mov", OP (0x10), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1636 { "mulh", OP (0x17), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1679 { "satadd", OP (0x11), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
  /src/external/gpl3/binutils.old/dist/opcodes/
mips-opc.c 285 #define I5 INSN_ISA5
v850-opc.c 1116 #define I5 (D4U + 1)
1120 #define I5DIV1 (I5 + 1)
1290 #define IF2 {I5, R2}
1455 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 },
1624 { "mov", OP (0x10), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1636 { "mulh", OP (0x17), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1679 { "satadd", OP (0x11), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
  /src/external/gpl3/gdb/dist/opcodes/
mips-opc.c 285 #define I5 INSN_ISA5
v850-opc.c 1116 #define I5 (D4U + 1)
1120 #define I5DIV1 (I5 + 1)
1290 #define IF2 {I5, R2}
1455 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 },
1624 { "mov", OP (0x10), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1636 { "mulh", OP (0x17), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1679 { "satadd", OP (0x11), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
  /src/external/gpl3/gdb.old/dist/opcodes/
mips-opc.c 284 #define I5 INSN_ISA5
v850-opc.c 1116 #define I5 (D4U + 1)
1120 #define I5DIV1 (I5 + 1)
1290 #define IF2 {I5, R2}
1455 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 },
1624 { "mov", OP (0x10), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1636 { "mulh", OP (0x17), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1679 { "satadd", OP (0x11), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },

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