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    Searched defs:I64 (Results 1 - 19 of 19) sorted by relevancy

  /src/sys/arch/hppa/hppa/
lock_stubs.S 224 #define I64 \
231 I64 I64
232 I64 I64
233 I64 I64
234 I64 I64
235 I64 I6
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/Utils/
WebAssemblyTypeUtilities.h 30 I64 = unsigned(wasm::ValType::I64),
  /src/sys/lib/libsa/
loadfile_elf32.c 85 #define I64(f) \
110 I64(ehdr->e_entry);
111 I64(ehdr->e_phoff);
112 I64(ehdr->e_shoff);
177 I64(phdr->p_offset);
178 I64(phdr->p_vaddr);
179 I64(phdr->p_paddr);
180 I64(phdr->p_filesz);
181 I64(phdr->p_memsz);
183 I64(phdr->p_align)
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/Demangle/
RustDemangle.h 37 I64,
  /src/external/gpl3/binutils/dist/opcodes/
mips16-opc.c 203 #define I64 INSN_ISA64
453 {"sew", "x", 0xe8d1, 0xf8ff, MOD_1, SH, I64, 0, 0 },
456 {"zew", "x", 0xe851, 0xf8ff, MOD_1, SH, I64, 0, 0 },
mips-opc.c 287 #define I64 INSN_ISA64
1036 {"dclo", "U,s", 0x70000025, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1038 {"dclz", "U,s", 0x70000024, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1107 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, WR_1|RD_C0|LC, 0, I64, 0, 0 },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
3386 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, WR_1|RD_C2|LC, 0, I64, 0, IOCT|IOCTP|IOCT2 },
3389 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, RD_1|WR_C2|WR_CC|CM, 0, I64, 0, IOCT|IOCTP|IOCT2 },
  /src/external/gpl3/binutils.old/dist/opcodes/
mips16-opc.c 203 #define I64 INSN_ISA64
453 {"sew", "x", 0xe8d1, 0xf8ff, MOD_1, SH, I64, 0, 0 },
456 {"zew", "x", 0xe851, 0xf8ff, MOD_1, SH, I64, 0, 0 },
mips-opc.c 287 #define I64 INSN_ISA64
1036 {"dclo", "U,s", 0x70000025, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1038 {"dclz", "U,s", 0x70000024, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1107 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, WR_1|RD_C0|LC, 0, I64, 0, 0 },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
3386 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, WR_1|RD_C2|LC, 0, I64, 0, IOCT|IOCTP|IOCT2 },
3389 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, RD_1|WR_C2|WR_CC|CM, 0, I64, 0, IOCT|IOCTP|IOCT2 },
  /src/external/gpl3/gdb/dist/opcodes/
mips16-opc.c 203 #define I64 INSN_ISA64
453 {"sew", "x", 0xe8d1, 0xf8ff, MOD_1, SH, I64, 0, 0 },
456 {"zew", "x", 0xe851, 0xf8ff, MOD_1, SH, I64, 0, 0 },
mips-opc.c 287 #define I64 INSN_ISA64
1036 {"dclo", "U,s", 0x70000025, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1038 {"dclz", "U,s", 0x70000024, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1107 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, WR_1|RD_C0|LC, 0, I64, 0, 0 },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
3386 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, WR_1|RD_C2|LC, 0, I64, 0, IOCT|IOCTP|IOCT2 },
3389 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, RD_1|WR_C2|WR_CC|CM, 0, I64, 0, IOCT|IOCTP|IOCT2 },
  /src/external/gpl3/gdb.old/dist/opcodes/
mips16-opc.c 203 #define I64 INSN_ISA64
453 {"sew", "x", 0xe8d1, 0xf8ff, MOD_1, SH, I64, 0, 0 },
456 {"zew", "x", 0xe851, 0xf8ff, MOD_1, SH, I64, 0, 0 },
mips-opc.c 286 #define I64 INSN_ISA64
1035 {"dclo", "U,s", 0x70000025, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1037 {"dclz", "U,s", 0x70000024, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, I69 },
1106 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, WR_1|RD_C0|LC, 0, I64, 0, 0 },
1112 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
3381 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, WR_1|RD_C2|LC, 0, I64, 0, IOCT|IOCTP|IOCT2 },
3384 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, RD_1|WR_C2|WR_CC|CM, 0, I64, 0, IOCT|IOCTP|IOCT2 },
  /src/external/gpl3/gcc/dist/gcc/config/alpha/
vms.h 137 enum avms_arg_type {I64, FF, FD, FG, FS, FT};
152 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
153 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
  /src/external/gpl3/gcc.old/dist/gcc/config/alpha/
vms.h 137 enum avms_arg_type {I64, FF, FD, FG, FS, FT};
152 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
153 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
  /src/external/apache2/llvm/dist/llvm/include/llvm/BinaryFormat/
Wasm.h 394 I64 = WASM_TYPE_I64,
  /src/external/apache2/llvm/dist/llvm/include/llvm/Support/
AMDGPUMetadata.h 105 I64 = 9,
  /src/external/gpl3/gcc/dist/gcc/config/ia64/
ia64.h 885 enum ivms_arg_type {I64, FF, FD, FG, FS, FT};
906 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
907 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
908 (CUM).atypes[6] = (CUM).atypes[7] = I64; \
923 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
924 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
925 (CUM).atypes[6] = (CUM).atypes[7] = I64; \
  /src/external/gpl3/gcc.old/dist/gcc/config/ia64/
ia64.h 885 enum ivms_arg_type {I64, FF, FD, FG, FS, FT};
906 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
907 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
908 (CUM).atypes[6] = (CUM).atypes[7] = I64; \
923 (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
924 (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
925 (CUM).atypes[6] = (CUM).atypes[7] = I64; \
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPULibFunc.h 269 I64 = INT | B64,

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