1 /* 7/18/95 */ 2 /*----------------------------------------------------------------------------*/ 3 /* Residual Data header definitions and prototypes */ 4 /*----------------------------------------------------------------------------*/ 5 6 /* Structure map for RESIDUAL on PowerPC Reference Platform */ 7 /* residual.h - Residual data structure passed in r3. */ 8 /* Load point passed in r4 to boot image. */ 9 /* For enum's: if given in hex then they are bit significant, */ 10 /* i.e. only one bit is on for each enum */ 11 /* Reserved fields must be filled with zeros. */ 12 13 #ifndef _RESIDUAL_ 14 #define _RESIDUAL_ 15 16 #ifndef __ASSEMBLY__ 17 18 #define MAX_CPUS 32 /* These should be set to the maximum */ 19 #define MAX_MEMS 64 /* number possible for this system. */ 20 #define MAX_DEVICES 256 /* Changing these will change the */ 21 #define AVE_PNP_SIZE 32 /* structure, hence the version of */ 22 #define MAX_MEM_SEGS 64 /* this header file. */ 23 24 /*----------------------------------------------------------------------------*/ 25 /* Public structures... */ 26 /*----------------------------------------------------------------------------*/ 27 28 #include "pnp.h" 29 30 typedef enum _L1CACHE_TYPE { 31 NoneCAC = 0, 32 SplitCAC = 1, 33 CombinedCAC = 2 34 } L1CACHE_TYPE; 35 36 typedef enum _TLB_TYPE { 37 NoneTLB = 0, 38 SplitTLB = 1, 39 CombinedTLB = 2 40 } TLB_TYPE; 41 42 typedef enum _FIRMWARE_SUPPORT { 43 Conventional = 0x01, 44 OpenFirmware = 0x02, 45 Diagnostics = 0x04, 46 LowDebug = 0x08, 47 Multiboot = 0x10, 48 LowClient = 0x20, 49 Hex41 = 0x40, 50 FAT = 0x80, 51 ISO9660 = 0x0100, 52 SCSI_InitiatorID_Override = 0x0200, 53 Tape_Boot = 0x0400, 54 FW_Boot_Path = 0x0800 55 } FIRMWARE_SUPPORT; 56 57 typedef enum _FIRMWARE_SUPPLIERS { 58 IBMFirmware = 0x00, 59 MotoFirmware = 0x01, /* 7/18/95 */ 60 FirmWorks = 0x02, /* 10/5/95 */ 61 Bull = 0x03, /* 04/03/96 */ 62 } FIRMWARE_SUPPLIERS; 63 64 typedef enum _ENDIAN_SWITCH_METHODS { 65 UsePort92 = 0x01, 66 UsePCIConfigA8 = 0x02, 67 UseFF001030 = 0x03, 68 } ENDIAN_SWITCH_METHODS; 69 70 typedef enum _SPREAD_IO_METHODS { 71 UsePort850 = 0x00, 72 /*UsePCIConfigA8 = 0x02,*/ 73 } SPREAD_IO_METHODS; 74 75 typedef struct _VPD { 76 77 /* Box dependent stuff */ 78 unsigned char PrintableModel[32]; /* Null terminated string. 79 Must be of the form: 80 vvv,<20h>,<model designation>,<0x0> 81 where vvv is the vendor ID 82 e.g. IBM PPS MODEL 6015<0x0> */ 83 unsigned char Serial[16]; /* 12/94: 84 Serial Number; must be of the form: 85 vvv<serial number> where vvv is the 86 vendor ID. 87 e.g. IBM60151234567<20h><20h> */ 88 unsigned char Reserved[48]; 89 unsigned long FirmwareSupplier; /* See FirmwareSuppliers enum */ 90 unsigned long FirmwareSupports; /* See FirmwareSupport enum */ 91 unsigned long NvramSize; /* Size of nvram in bytes */ 92 unsigned long NumSIMMSlots; 93 unsigned short EndianSwitchMethod; /* See EndianSwitchMethods enum */ 94 unsigned short SpreadIOMethod; /* See SpreadIOMethods enum */ 95 unsigned long SmpIar; 96 unsigned long RAMErrLogOffset; /* Heap offset to error log */ 97 unsigned long Reserved5; 98 unsigned long Reserved6; 99 unsigned long ProcessorHz; /* Processor clock frequency in Hertz */ 100 unsigned long ProcessorBusHz; /* Processor bus clock frequency */ 101 unsigned long Reserved7; 102 unsigned long TimeBaseDivisor; /* (Bus clocks per timebase tic)*1000 */ 103 unsigned long WordWidth; /* Word width in bits */ 104 unsigned long PageSize; /* Page size in bytes */ 105 unsigned long CoherenceBlockSize; /* Unit of transfer in/out of cache 106 for which coherency is maintained; 107 normally <= CacheLineSize. */ 108 unsigned long GranuleSize; /* Unit of lock allocation to avoid */ 109 /* false sharing of locks. */ 110 111 /* L1 Cache variables */ 112 unsigned long CacheSize; /* L1 Cache size in KB. This is the */ 113 /* total size of the L1, whether */ 114 /* combined or split */ 115 unsigned long CacheAttrib; /* L1CACHE_TYPE */ 116 unsigned long CacheAssoc; /* L1 Cache associativity. Use this 117 for combined cache. If split, put 118 zeros here. */ 119 unsigned long CacheLineSize; /* L1 Cache line size in bytes. Use 120 for combined cache. If split, put 121 zeros here. */ 122 /* For split L1 Cache: (= combined if combined cache) */ 123 unsigned long I_CacheSize; 124 unsigned long I_CacheAssoc; 125 unsigned long I_CacheLineSize; 126 unsigned long D_CacheSize; 127 unsigned long D_CacheAssoc; 128 unsigned long D_CacheLineSize; 129 130 /* Translation Lookaside Buffer variables */ 131 unsigned long TLBSize; /* Total number of TLBs on the system */ 132 unsigned long TLBAttrib; /* Combined I+D or split TLB */ 133 unsigned long TLBAssoc; /* TLB Associativity. Use this for 134 combined TLB. If split, put zeros 135 here. */ 136 /* For split TLB: (= combined if combined TLB) */ 137 unsigned long I_TLBSize; 138 unsigned long I_TLBAssoc; 139 unsigned long D_TLBSize; 140 unsigned long D_TLBAssoc; 141 142 unsigned long ExtendedVPD; /* Offset to extended VPD area; 143 null if unused */ 144 } VPD; 145 146 typedef enum _DEVICE_FLAGS { 147 Enabled = 0x4000, /* 1 - PCI device is enabled */ 148 Integrated = 0x2000, 149 Failed = 0x1000, /* 1 - device failed POST code tests */ 150 Static = 0x0800, /* 0 - dynamically configurable 151 1 - static */ 152 Dock = 0x0400, /* 0 - not a docking station device 153 1 - is a docking station device */ 154 Boot = 0x0200, /* 0 - device cannot be used for BOOT 155 1 - can be a BOOT device */ 156 Configurable = 0x0100, /* 1 - device is configurable */ 157 Disableable = 0x80, /* 1 - device can be disabled */ 158 PowerManaged = 0x40, /* 0 - not managed; 1 - managed */ 159 ReadOnly = 0x20, /* 1 - device is read only */ 160 Removable = 0x10, /* 1 - device is removable */ 161 ConsoleIn = 0x08, 162 ConsoleOut = 0x04, 163 Input = 0x02, 164 Output = 0x01 165 } DEVICE_FLAGS; 166 167 typedef enum _BUS_ID { 168 ISADEVICE = 0x01, 169 EISADEVICE = 0x02, 170 PCIDEVICE = 0x04, 171 PCMCIADEVICE = 0x08, 172 PNPISADEVICE = 0x10, 173 MCADEVICE = 0x20, 174 MXDEVICE = 0x40, /* Devices on mezzanine bus */ 175 PROCESSORDEVICE = 0x80, /* Devices on processor bus */ 176 VMEDEVICE = 0x100, 177 } BUS_ID; 178 179 typedef struct _DEVICE_ID { 180 unsigned long BusId; /* See BUS_ID enum above */ 181 unsigned long DevId; /* Big Endian format */ 182 unsigned long SerialNum; /* For multiple usage of a single 183 DevId */ 184 unsigned long Flags; /* See DEVICE_FLAGS enum above */ 185 unsigned char BaseType; /* See pnp.h for bit definitions */ 186 unsigned char SubType; /* See pnp.h for bit definitions */ 187 unsigned char Interface; /* See pnp.h for bit definitions */ 188 unsigned char Spare; 189 } DEVICE_ID; 190 191 typedef union _BUS_ACCESS { 192 struct _PnPAccess{ 193 unsigned char CSN; 194 unsigned char LogicalDevNumber; 195 unsigned short ReadDataPort; 196 } PnPAccess; 197 struct _ISAAccess{ 198 unsigned char SlotNumber; /* ISA Slot Number generally not 199 available; 0 if unknown */ 200 unsigned char LogicalDevNumber; 201 unsigned short ISAReserved; 202 } ISAAccess; 203 struct _MCAAccess{ 204 unsigned char SlotNumber; 205 unsigned char LogicalDevNumber; 206 unsigned short MCAReserved; 207 } MCAAccess; 208 struct _PCMCIAAccess{ 209 unsigned char SlotNumber; 210 unsigned char LogicalDevNumber; 211 unsigned short PCMCIAReserved; 212 } PCMCIAAccess; 213 struct _EISAAccess{ 214 unsigned char SlotNumber; 215 unsigned char FunctionNumber; 216 unsigned short EISAReserved; 217 } EISAAccess; 218 struct _PCIAccess{ 219 unsigned char BusNumber; 220 unsigned char DevFuncNumber; 221 unsigned short PCIReserved; 222 } PCIAccess; 223 struct _ProcBusAccess{ 224 unsigned char BusNumber; 225 unsigned char BUID; 226 unsigned short ProcBusReserved; 227 } ProcBusAccess; 228 } BUS_ACCESS; 229 230 /* Per logical device information */ 231 typedef struct _PPC_DEVICE { 232 DEVICE_ID DeviceId; 233 BUS_ACCESS BusAccess; 234 235 /* The following three are offsets into the DevicePnPHeap */ 236 /* All are in PnP compressed format */ 237 unsigned long AllocatedOffset; /* Allocated resource description */ 238 unsigned long PossibleOffset; /* Possible resource description */ 239 unsigned long CompatibleOffset; /* Compatible device identifiers */ 240 } PPC_DEVICE; 241 242 typedef enum _CPU_STATE { 243 CPU_GOOD = 0, /* CPU is present, and active */ 244 CPU_GOOD_FW = 1, /* CPU is present, and in firmware */ 245 CPU_OFF = 2, /* CPU is present, but inactive */ 246 CPU_FAILED = 3, /* CPU is present, but failed POST */ 247 CPU_NOT_PRESENT = 255 /* CPU not present */ 248 } CPU_STATE; 249 250 typedef struct _PPC_CPU { 251 unsigned long CpuType; /* Result of mfspr from Processor 252 Version Register (PVR). 253 PVR(0-15) = Version (e.g. 601) 254 PVR(16-31 = EC Level */ 255 unsigned char CpuNumber; /* CPU Number for this processor */ 256 unsigned char CpuState; /* CPU State, see CPU_STATE enum */ 257 unsigned short Reserved; 258 } PPC_CPU; 259 260 typedef struct _PPC_MEM { 261 unsigned long SIMMSize; /* 0 - absent or bad 262 8M, 32M (in MB) */ 263 } PPC_MEM; 264 265 typedef enum _MEM_USAGE { 266 Other = 0x8000, 267 ResumeBlock = 0x4000, /* for use by power management */ 268 SystemROM = 0x2000, /* Flash memory (populated) */ 269 UnPopSystemROM = 0x1000, /* Unpopulated part of SystemROM area */ 270 IOMemory = 0x0800, 271 SystemIO = 0x0400, 272 SystemRegs = 0x0200, 273 PCIAddr = 0x0100, 274 PCIConfig = 0x80, 275 ISAAddr = 0x40, 276 Unpopulated = 0x20, /* Unpopulated part of System Memory */ 277 Free = 0x10, /* Free part of System Memory */ 278 BootImage = 0x08, /* BootImage part of System Memory */ 279 FirmwareCode = 0x04, /* FirmwareCode part of System Memory */ 280 FirmwareHeap = 0x02, /* FirmwareHeap part of System Memory */ 281 FirmwareStack = 0x01 /* FirmwareStack part of System Memory*/ 282 } MEM_USAGE; 283 284 typedef struct _MEM_MAP { 285 unsigned long Usage; /* See MEM_USAGE above */ 286 unsigned long BasePage; /* Page number measured in 4KB pages */ 287 unsigned long PageCount; /* Page count measured in 4KB pages */ 288 } MEM_MAP; 289 290 typedef struct _RESIDUAL { 291 unsigned long ResidualLength; /* Length of Residual */ 292 unsigned char Version; /* of this data structure */ 293 unsigned char Revision; /* of this data structure */ 294 unsigned short EC; /* of this data structure */ 295 /* VPD */ 296 VPD VitalProductData; 297 /* CPU */ 298 unsigned short MaxNumCpus; /* Max CPUs in this system */ 299 unsigned short ActualNumCpus; /* ActualNumCpus < MaxNumCpus means */ 300 /* that there are unpopulated or */ 301 /* otherwise unusable CPU locations */ 302 PPC_CPU Cpus[MAX_CPUS]; 303 /* Memory */ 304 unsigned long TotalMemory; /* Total amount of memory installed */ 305 unsigned long GoodMemory; /* Total amount of good memory */ 306 unsigned long ActualNumMemSegs; 307 MEM_MAP Segs[MAX_MEM_SEGS]; 308 unsigned long ActualNumMemories; 309 PPC_MEM Memories[MAX_MEMS]; 310 /* Devices */ 311 unsigned long ActualNumDevices; 312 PPC_DEVICE Devices[MAX_DEVICES]; 313 unsigned char DevicePnPHeap[2*MAX_DEVICES*AVE_PNP_SIZE]; 314 } RESIDUAL; 315 316 317 extern RESIDUAL *res; 318 extern void print_residual_device_info(void); 319 extern PPC_DEVICE *residual_find_device(unsigned long BusMask, 320 unsigned char * DevID, int BaseType, 321 int SubType, int Interface, int n); 322 extern PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, unsigned packet_tag, 323 int n); 324 extern PnP_TAG_PACKET *PnP_find_small_vendor_packet(unsigned char *p, 325 unsigned packet_type, 326 int n); 327 extern PnP_TAG_PACKET *PnP_find_large_vendor_packet(unsigned char *p, 328 unsigned packet_type, 329 int n); 330 extern PPC_DEVICE *find_nth_pnp_device(const char *devid, int busid, int n); 331 extern int count_pnp_devices(const char *devid); 332 extern void pnp_devid_to_string(uint32_t devid, char *s); 333 extern int pnp_pci_busno(void *, int *bus); 334 extern int pnp_pci_configbase(void *v, uint32_t *addr, uint32_t *data); 335 #endif /* __ASSEMBLY__ */ 336 #endif /* ndef _RESIDUAL_ */ 337 338
Indexes created Sun Sep 21 14:09:52 GMT 2025