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      1 /*	$NetBSD: imx1-clock.h,v 1.1.1.2 2020/01/03 14:33:05 skrll Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0-only */
      4 /*
      5  * Copyright (C) 2014 Alexander Shiyan <shc_work (at) mail.ru>
      6  */
      7 
      8 #ifndef __DT_BINDINGS_CLOCK_IMX1_H
      9 #define __DT_BINDINGS_CLOCK_IMX1_H
     10 
     11 #define IMX1_CLK_DUMMY		0
     12 #define IMX1_CLK_CLK32		1
     13 #define IMX1_CLK_CLK16M_EXT	2
     14 #define IMX1_CLK_CLK16M		3
     15 #define IMX1_CLK_CLK32_PREMULT	4
     16 #define IMX1_CLK_PREM		5
     17 #define IMX1_CLK_MPLL		6
     18 #define IMX1_CLK_MPLL_GATE	7
     19 #define IMX1_CLK_SPLL		8
     20 #define IMX1_CLK_SPLL_GATE	9
     21 #define IMX1_CLK_MCU		10
     22 #define IMX1_CLK_FCLK		11
     23 #define IMX1_CLK_HCLK		12
     24 #define IMX1_CLK_CLK48M		13
     25 #define IMX1_CLK_PER1		14
     26 #define IMX1_CLK_PER2		15
     27 #define IMX1_CLK_PER3		16
     28 #define IMX1_CLK_CLKO		17
     29 #define IMX1_CLK_UART3_GATE	18
     30 #define IMX1_CLK_SSI2_GATE	19
     31 #define IMX1_CLK_BROM_GATE	20
     32 #define IMX1_CLK_DMA_GATE	21
     33 #define IMX1_CLK_CSI_GATE	22
     34 #define IMX1_CLK_MMA_GATE	23
     35 #define IMX1_CLK_USBD_GATE	24
     36 #define IMX1_CLK_MAX		25
     37 
     38 #endif
     39