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      1 /*	$NetBSD: imx8mm.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0 */
      4 /*
      5  * Interconnect framework driver for i.MX SoC
      6  *
      7  * Copyright (c) 2019, BayLibre
      8  * Copyright (c) 2019-2020, NXP
      9  * Author: Alexandre Bailon <abailon (at) baylibre.com>
     10  */
     11 
     12 #ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H
     13 #define __DT_BINDINGS_INTERCONNECT_IMX8MM_H
     14 
     15 #define IMX8MM_ICN_NOC		1
     16 #define IMX8MM_ICS_DRAM		2
     17 #define IMX8MM_ICS_OCRAM	3
     18 #define IMX8MM_ICM_A53		4
     19 
     20 #define IMX8MM_ICM_VPU_H1	5
     21 #define IMX8MM_ICM_VPU_G1	6
     22 #define IMX8MM_ICM_VPU_G2	7
     23 #define IMX8MM_ICN_VIDEO	8
     24 
     25 #define IMX8MM_ICM_GPU2D	9
     26 #define IMX8MM_ICM_GPU3D	10
     27 #define IMX8MM_ICN_GPU		11
     28 
     29 #define IMX8MM_ICM_CSI		12
     30 #define IMX8MM_ICM_LCDIF	13
     31 #define IMX8MM_ICN_MIPI		14
     32 
     33 #define IMX8MM_ICM_USB1		15
     34 #define IMX8MM_ICM_USB2		16
     35 #define IMX8MM_ICM_PCIE		17
     36 #define IMX8MM_ICN_HSIO		18
     37 
     38 #define IMX8MM_ICM_SDMA2	19
     39 #define IMX8MM_ICM_SDMA3	20
     40 #define IMX8MM_ICN_AUDIO	21
     41 
     42 #define IMX8MM_ICN_ENET		22
     43 #define IMX8MM_ICM_ENET		23
     44 
     45 #define IMX8MM_ICN_MAIN		24
     46 #define IMX8MM_ICM_NAND		25
     47 #define IMX8MM_ICM_SDMA1	26
     48 #define IMX8MM_ICM_USDHC1	27
     49 #define IMX8MM_ICM_USDHC2	28
     50 #define IMX8MM_ICM_USDHC3	29
     51 
     52 #endif /* __DT_BINDINGS_INTERCONNECT_IMX8MM_H */
     53