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      1 /* 	$NetBSD: i82093reg.h,v 1.7 2022/10/06 06:51:36 msaitoh Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by RedBack Networks Inc.
      9  *
     10  * Author: Bill Sommerfeld
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Typically, the first apic lives here.
     36  */
     37 #define IOAPIC_BASE_DEFAULT	0xfec00000
     38 
     39 /*
     40  * Memory-space registers.
     41  */
     42 
     43 /*
     44  * The externally visible registers are all 32 bits wide;
     45  * store the register number of interest in IOAPIC_REG, and store/fetch
     46  * the real value in IOAPIC_DATA.
     47  */
     48 
     49 
     50 
     51 #define	IOAPIC_REG		0x0000
     52 #define IOAPIC_DATA		0x0010
     53 #define IOAPIC_EOI		0x0040
     54 #define		IOAPIC_EOI_MASK		0x000000ff
     55 
     56 /*
     57  * Internal I/O APIC registers.
     58  */
     59 
     60 #define IOAPIC_ID		0x00
     61 
     62 #define 	IOAPIC_ID_SHIFT		24
     63 #define		IOAPIC_ID_MASK		0xff000000
     64 
     65 /* Version, and maximum interrupt pin number. */
     66 
     67 #define IOAPIC_VER		0x01
     68 
     69 #define		IOAPIC_VER_SHIFT		0
     70 #define		IOAPIC_VER_MASK			0x000000ff
     71 
     72 #define		IOAPIC_MAX_SHIFT	       	16
     73 #define		IOAPIC_MAX_MASK	       	0x00ff0000
     74 
     75 /*
     76  * Arbitration ID.  Same format as IOAPIC_ID register.
     77  */
     78 #define IOAPIC_ARB		0x02
     79 
     80 /*
     81  * Redirection table registers.
     82  */
     83 
     84 #define IOAPIC_REDTBL		0x10
     85 #define IOAPIC_REDHI(pin)	(IOAPIC_REDTBL + ((pin) << 1) + 1)
     86 #define IOAPIC_REDLO(pin)	(IOAPIC_REDTBL + ((pin) << 1))
     87 
     88 #define IOAPIC_REDHI_DEST_SHIFT		24	   /* destination. */
     89 #define IOAPIC_REDHI_DEST_MASK		0xff000000
     90 
     91 #define IOAPIC_REDLO_MASK		0x00010000 /* 0=enabled; 1=masked */
     92 
     93 #define IOAPIC_REDLO_LEVEL		0x00008000 /* 0=edge, 1=level */
     94 #define IOAPIC_REDLO_RIRR		0x00004000 /* remote IRR; read only */
     95 #define IOAPIC_REDLO_ACTLO		0x00002000 /* 0=act. hi; 1=act. lo */
     96 #define IOAPIC_REDLO_DELSTS		0x00001000 /* 0=idle; 1=send pending */
     97 #define IOAPIC_REDLO_DSTMOD		0x00000800 /* 0=physical; 1=logical */
     98 
     99 #define IOAPIC_REDLO_DEL_MASK		0x00000700 /* del. mode mask */
    100 #define IOAPIC_REDLO_DEL_SHIFT		8
    101 
    102 #define IOAPIC_REDLO_DEL_FIXED		0
    103 #define IOAPIC_REDLO_DEL_LOPRI		1
    104 #define IOAPIC_REDLO_DEL_SMI		2
    105 #define IOAPIC_REDLO_DEL_NMI		4
    106 #define IOAPIC_REDLO_DEL_INIT		5
    107 #define IOAPIC_REDLO_DEL_EXTINT		7
    108 
    109 #define IOAPIC_REDLO_VECTOR_MASK	0x000000ff /* delivery vector */
    110 
    111 #define IMCR_ADDR		0x22
    112 #define IMCR_DATA		0x23
    113 
    114 #define IMCR_REGISTER		0x70
    115 #define		IMCR_PIC	0x00
    116 #define 	IMCR_APIC	0x01
    117