| /src/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/Native/ |
| NativeExeSymbol.cpp | 68 auto IS = Session.getPDBFile().getPDBInfoStream();
69 if (IS)
70 return IS->getAge();
71 consumeError(IS.takeError());
80 auto IS = Session.getPDBFile().getPDBInfoStream();
81 if (IS)
82 return IS->getGuid();
83 consumeError(IS.takeError());
|
| NativeFunctionSymbol.cpp | 59 static bool inlineSiteContainsAddress(InlineSiteSym &IS,
64 for (auto &Annot : IS.annotations()) {
118 InlineSiteSym IS =
120 if (inlineSiteContainsAddress(IS, CodeOffset)) {
123 IS, getVirtualAddress(), Modi, Start.offset());
128 End = Syms.at(IS.End);
133 Start = Syms.at(IS.End);
|
| PDBFile.cpp | 118 "PDBFile is immutable");
129 "MSF superblock is missing");
137 "File size is not a multiple of block size");
147 // the Fpm is split across the file at `getBlockSize()` intervals. As a
148 // result, every block whose index is of the form |{1,2} + getBlockSize() * k|
149 // for any non-negative integer k is an Fpm block. In theory, we only really
190 // is exactly what we are attempting to parse. By specifying a custom
209 // For convenience, we store the block array contiguously. This is because
210 // if someone calls setStreamMap(), it is more convenient to be able to call
212 // DirectoryStream is cached in the class and thus lives for the life of th
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/ |
| RetireStage.cpp | 50 Instruction &IS = *IR.getInstruction();
52 PRF.onInstructionExecuted(&IS);
53 unsigned TokenID = IS.getRCUTokenID();
|
| DispatchStage.cpp | 12 /// The DispatchStage is responsible for updating instruction dependencies
14 /// is ready to be scheduled for execution.
80 Instruction &IS = *IR.getInstruction();
81 const InstrDesc &Desc = IS.getDesc();
82 const unsigned NumMicroOps = IS.getNumMicroOps();
97 // Check if this is an optimizable reg-reg move or an XCHG-like instruction.
98 if (IS.isOptimizableMove())
99 if (PRF.tryEliminateMoveOrSwap(IS.getDefs(), IS.getUses()))
100 IS.setEliminated()
[all...] |
| ExecuteStage.cpp | 12 /// The ExecuteStage is responsible for managing the hardware scheduler
59 Instruction &IS = *IR.getInstruction();
60 NumIssuedOpcodes += IS.getNumMicroOps();
65 if (IS.isExecuted()) {
187 assert(isAvailable(IR) && "Scheduler is not available!");
199 // be released after MCIS is issued, and all the ResourceCycles for those
215 // If we did not return early, then the scheduler is ready for execution.
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| ScoreboardHazardRecognizer.cpp | 45 const InstrStage *IS = ItinData->beginStage(idx);
49 for (; IS != E; ++IS) {
50 unsigned StageDepth = CurCycle + IS->getCycles();
52 CurCycle += IS->getNextCycles();
69 // If MaxLookAhead is not set above, then we are not enabled.
129 for (const InstrStage *IS = ItinData->beginStage(idx),
130 *E = ItinData->endStage(idx); IS != E; ++IS) {
132 // stage is occupied. FIXME it would be more accurate to find th
[all...] |
| /src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/ |
| BottleneckAnalysis.cpp | 119 const Instruction &IS = *IR.getInstruction();
120 unsigned BusyResources = IS.getCriticalResourceMask() & ResourceMask;
207 // A critical sequence is computed as the longest path from a node of the
208 // RootSet to a leaf node (i.e. a node with no successors). The RootSet is
212 // cost of a node is a measure of criticality: the higher the cost, the bigger
213 // is the performance impact.
214 // For register and memory dependencies, the cost is a function of the write
216 // For processor resource dependencies, the cost is a function of the resource
219 // This algorithm is very similar to a (reverse) Dijkstra. Every iteration of
224 // RootSet. A node N is added to the `unvisited nodes` if all it
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/ |
| LSUnit.cpp | 131 // A new load group is created if we are in one of the following situations:
132 // 1) This is a load barrier (by construction, a load barrier is always
134 // 2) There is no load in flight (by construction we always keep loads and
136 // 3) There is a load barrier in flight. This load depends on it.
137 // 4) There is an intervening store between the last load dispatched to the
140 // 5) There is no intervening store and there is an active load group.
155 // unless flag 'NoAlias' is set.
233 const Instruction &IS = *IR.getInstruction()
[all...] |
| Scheduler.cpp | 33 dbgs() << "[SCHEDULER]: WaitSet size is: " << WaitSet.size() << '\n';
34 dbgs() << "[SCHEDULER]: ReadySet size is: " << ReadySet.size() << '\n';
35 dbgs() << "[SCHEDULER]: IssuedSet size is: " << IssuedSet.size() << '\n';
73 Instruction *IS = IR.getInstruction();
74 const InstrDesc &D = IS->getDesc();
77 // into a vector. That vector is then used to notify the listener.
82 IS->execute(IR.getSourceIndex());
84 IS->computeCriticalRegDep();
86 if (IS->isMemOp()) {
88 const MemoryGroup &Group = LSU.getGroup(IS->getLSUTokenID())
[all...] |
| /src/sys/external/isc/atheros_hal/dist/ar5312/ |
| ar5312_reset.c | 6 * purpose with or without fee is hereby granted, provided that the above
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
79 * bChannelChange is used to preserve DMA/PCU registers across
105 #define IS(_c,_f) (((_c)->channelFlags & _f) || 0)
106 if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan, CHANNEL_5GHZ)) == 0) {
112 if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0) {
118 #undef IS
[all...] |
| /src/external/mit/lua/dist/src/ |
| luac.c | 66 " -o name output to file 'name' (default is \"%s\")\n"
76 #define IS(s) (strcmp(argv[i],s)==0)
87 else if (IS("--")) /* end of options; skip it */
93 else if (IS("-")) /* end of options; use stdin */
95 else if (IS("-l")) /* list */
97 else if (IS("-o")) /* output file */
102 if (IS("-")) output=NULL;
104 else if (IS("-p")) /* parse only */
106 else if (IS("-s")) /* strip debug information */
108 else if (IS("-v")) /* show version *
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/ |
| LSUnit.h | 32 /// A Memory group identifier is then stored as a "token" in field
33 /// Instruction::LSUTokenID of each dispatched instructions. That token is used
83 // Do not need to add a dependency if there is no data
140 const Instruction &IS = *IR.getInstruction();
143 if (OtherIS.getCyclesLeft() < IS.getCyclesLeft())
196 /// A value of zero for this field means that the load queue is unbounded.
204 /// A value of zero for this field means that the store queue is unbounded.
216 /// eachother. If this field is set to false, then loads are always assumed to
254 /// accomodate instruction IR. By default, LSU_AVAILABLE is returned if IR is
[all...] |
| /src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| CodeGenIntrinsics.h | 35 /// intrinsic. If the number of return values is > 1, then the intrinsic
38 /// the parameter list. This is useful for "matching" types.
40 /// The MVT::SimpleValueType for each return type. Note that this list is
49 /// The MVT::SimpleValueType for each parameter type. Note that this list is
59 IntrinsicSignature IS;
65 /// The intrinsic may access memory that is otherwise inaccessible via
73 /// The intrinsic may access memory anywhere, i.e. it is not restricted
110 /// This is set to true if the intrinsic is overloaded by its argument
114 /// True if the intrinsic is commutative
[all...] |
| /src/libexec/getty/ |
| gettytab.h | 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
98 #define IS gettynums[0].value
|
| /src/external/apache2/llvm/dist/clang/lib/Sema/ |
| JumpDiagnostics.cpp | 9 // This file implements the JumpScopeChecker class, which is used to diagnose
27 /// JumpScopeChecker - This object is used by Sema to diagnose invalid jumps
35 /// the target is unknown. Return statements with \c [[clang::musttail]] cannot
44 /// GotoScope - This is a record that we use to keep track of all of the
50 /// ParentScope - The index in ScopeMap of the parent scope. This is 0 for
51 /// the parent scope is the function body.
54 /// InDiag - The note to emit if there is a jump into this scope.
57 /// OutDiag - The note to emit if there is an indirect jump out
187 // storage duration is not in scope to a point where it is in scop
[all...] |
| SemaExceptionSpec.cpp | 84 // FIXME: This is bogus, a noexcept expression is not a condition.
110 /// CheckSpecifiedExceptionType - Check if the given type is valid in an
115 /// when the input is an array or a function type.
119 // in an exception-specification is adjusted to type T, "pointer to T", or
134 // cv void* is explicitly permitted, despite being a pointer to an
181 /// CheckDistantExceptionSpec - Check if the given type is a pointer or pointer
183 /// it is invalid to add another level of indirection.
276 // - if this is a destructor, its exception specification is implicit
[all...] |
| AnalysisBasedWarnings.cpp | 116 // Note that this is also a performance optimization. Analyzing
185 // Returns true if the function is called anywhere within the CFGBlock.
187 // this pointer is required.
268 // If the exit block is unreachable, skip processing the function.
272 // Emit diagnostic if a recursive function call is detected for all paths.
306 !E->getSubExpr() || // throw; is considered cuaght by any handler
427 // Now we know what is live, we check the live precessors of the exit block
455 // Destructors can appear after the 'return' in the CFG. This is
491 // TODO: Verify this is correct.
766 // Don't issue a fixit if there is already an initializer
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/Orc/ |
| OrcV2CBindings.cpp | 321 auto IS = OrcV2CAPIHelper::moveToSymbolStringPtr(unwrap(InitSym));
324 Name, std::move(SFM), std::move(IS), Ctx, Materialize, Discard, Destroy));
393 "if Filter is null then FilterCtx must also be null");
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-pdbutil/ |
| llvm-pdbutil.cpp | 305 cl::desc("Assume the module is loaded at the specified address"),
389 "is SN[:Start][@Size]"),
740 "string, even if it is a valid integer"),
945 while (auto IS = Sources->getNext()) {
947 std::string File = stringOr(IS->getFileName(), "<null>");
948 uint64_t Size = IS->getCodeByteSize();
949 std::string Obj = stringOr(IS->getObjectFileName(), "<null>");
950 std::string VFName = stringOr(IS->getVirtualFileName(), "<null>");
951 uint32_t CRC = IS->getCrc32();
973 IS->getCompression())
[all...] |
| /src/sys/external/isc/atheros_hal/dist/ar5211/ |
| ar5211_reset.c | 6 * purpose with or without fee is hereby granted, provided that the above
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
145 * bChannelChange is used to preserve DMA/PCU registers across
174 #define IS(_c,_f) (((_c)->channelFlags & _f) || 0)
175 if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan,CHANNEL_5GHZ)) == 0) {
181 if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0) {
187 #undef IS
[all...] |
| /src/sys/external/isc/atheros_hal/dist/ar5212/ |
| ar5212_reset.c | 6 * purpose with or without fee is hereby granted, provided that the above
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
95 * bChannelChange is used to preserve DMA/PCU registers across
125 #define IS(_c,_f) (((_c)->channelFlags & _f) || 0)
126 if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan, CHANNEL_5GHZ)) == 0) {
132 if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0) {
138 #undef IS
[all...] |
| /src/sys/external/isc/atheros_hal/dist/ar5416/ |
| ar5416_reset.c | 6 * purpose with or without fee is hereby granted, provided that the above
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
31 /* Eeprom versioning macros. Returns true if the version is equal or newer than the ver specified */
92 * bChannelChange is used to preserve DMA/PCU registers across
112 #define IS(_c,_f) (((_c)->channelFlags & _f) || 0)
113 if ((IS(chan, CHANNEL_2GHZ) ^ IS(chan, CHANNEL_5GHZ)) == 0) {
119 if ((IS(chan, CHANNEL_OFDM) ^ IS(chan, CHANNEL_CCK)) == 0)
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/ |
| RegionStore.cpp | 366 /// This is currently used to decide whether or not it is worth "forcing" a
369 /// This is controlled by 'region-store-small-struct-limit' option.
392 /// the value is not specified.
400 /// the array). This is called by ExprEngine when evaluating
430 InvalidatedSymbols &IS,
449 // BindDefaultInitial is only used to initialize a region with
462 // BindDefaultZero is used for zeroing constructors that may accidentally
488 /// This path is used when it seems advantageous to "force" loading the values
490 /// than using a Default binding at the base of the entire region. This is
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | 208 /// This class is used by SelectionDAGISel to temporarily override
211 SelectionDAGISel &IS;
217 CodeGenOpt::Level NewOptLevel) : IS(ISel) {
218 SavedOptLevel = IS.OptLevel;
219 SavedFastISel = IS.TM.Options.EnableFastISel;
222 IS.OptLevel = NewOptLevel;
223 IS.TM.setOptLevel(NewOptLevel);
225 << IS.MF->getFunction().getName() << "\n");
229 IS.TM.setFastISel(IS.TM.getO0WantsFastISel())
[all...] |
