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      1 /*	$NetBSD: itesio_isavar.h,v 1.14 2021/07/03 04:44:16 nonaka Exp $	*/
      2 /*	$OpenBSD: itvar.h,v 1.2 2003/11/05 20:57:10 grange Exp $	*/
      3 
      4 /*
      5  * Copyright (c) 2006-2007 Juan Romero Pardines <xtraeme (at) netbsd.org>
      6  * Copyright (c) 2003 Julien Bordet <zejames (at) greyhats.org>
      7  * All rights reserved.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITD TO, THE IMPLIED WARRANTIES
     20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     23  * NOT LIMITD TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     28  */
     29 
     30 #ifndef _DEV_ISA_ITESIO_ISAVAR_H
     31 #define _DEV_ISA_ITESIO_ISAVAR_H
     32 
     33 #define IT_NUM_SENSORS	15
     34 
     35 /* Super I/O Configuration Registers */
     36 #define ITESIO_ADDR	0	/* Address Port = 0x2e */
     37 #define ITESIO_DATA	1	/* Data Port = 0x2f */
     38 
     39 #define ITESIO_LDNSEL	0x07	/* Logical Device Number Selection */
     40 
     41 #define ITESIO_EC_LDN	0x04	/* EC Logical Device Number */
     42 #define ITESIO_EC_MSB	0x60	/* EC Base Address (MSB) */
     43 #define ITESIO_EC_LSB	0x61	/* EC Base Address (LSB) */
     44 
     45 #define ITESIO_WDT_LDN	0x07	/* Watchdog Logical Device Number */
     46 #define ITESIO_WDT_CTL	0x71	/* Watchdog Control Register */
     47 #define ITESIO_WDT_CNF	0x72	/* Watchdog Configuration Register */
     48 #define   ITESIO_WDT_CNF_SECS	(1<<7)	/* Use seconds for the timer */
     49 #define   ITESIO_WDT_CNF_KRST	(1<<6)	/* Enable KRST */
     50 #define   ITESIO_WDT_CNF_PWROK	(1<<4)	/* Enable PWROK */
     51 #define ITESIO_WDT_TMO_LSB	0x73	/* Watchdog Timeout Value LSB */
     52 #define ITESIO_WDT_TMO_MSB	0x74	/* Watchdog Timeout Value MSB */
     53 
     54 #define ITESIO_WDT_MAXTIMO	0xffff	/* either seconds or minutes */
     55 
     56 #define ITESIO_CHIPID1	0x20	/* Chip ID 1 */
     57 #define ITESIO_CHIPID2	0x21	/* Chip ID 2 */
     58 #define ITESIO_DEVREV	0x22	/* Device Revision */
     59 
     60 #define ITESIO_ID8625	0x8625
     61 #define ITESIO_ID8628	0x8628
     62 #define ITESIO_ID8655	0x8655
     63 #define ITESIO_ID8705	0x8705
     64 #define ITESIO_ID8712	0x8712
     65 #define ITESIO_ID8716	0x8716
     66 #define ITESIO_ID8718	0x8718
     67 #define ITESIO_ID8720	0x8720
     68 #define ITESIO_ID8721	0x8721
     69 #define ITESIO_ID8726	0x8726
     70 #define ITESIO_ID8728	0x8728
     71 #define ITESIO_ID8771	0x8771
     72 #define ITESIO_ID8772	0x8772
     73 
     74 /*
     75  * Control registers for the Environmental Controller, relative
     76  * to the Base Address Register.
     77  */
     78 #define ITESIO_EC_ADDR 	0x05
     79 #define ITESIO_EC_DATA 	0x06
     80 
     81 /* Data registers */
     82 #define ITESIO_EC_CONFIG 	0x00
     83 #define ITESIO_EC_ISR1 		0x01
     84 #define ITESIO_EC_ISR2 		0x02
     85 #define ITESIO_EC_ISR3 		0x03
     86 #define ITESIO_EC_SMI1 		0x04
     87 #define ITESIO_EC_SMI2 		0x05
     88 #define ITESIO_EC_SMI3 		0x06
     89 #define ITESIO_EC_IMR1 		0x07
     90 #define ITESIO_EC_IMR2 		0x08
     91 #define ITESIO_EC_IMR3 		0x09
     92 #define ITESIO_EC_VID 		0x0a
     93 #define ITESIO_EC_FAN_TDR 	0x0b	/* Fan Tachometer Divisor Register */
     94 #define ITESIO_EC_FAN16_CER 	0x0c	/* Fan Tachometer 16-bit Counter Enable Register */
     95 
     96 #define ITESIO_EC_VOLTENABLE 	0x50
     97 #define ITESIO_EC_TEMPENABLE 	0x51
     98 
     99 #define ITESIO_EC_FANMINBASE	0x10
    100 #define ITESIO_EC_FANENABLE	0x13
    101 
    102 #define ITESIO_EC_SENSORFANBASE 	0x0d	/* Fan from 0x0d to 0x0f */
    103 #define ITESIO_EC_SENSORFANEXTBASE 	0x18 	/* Fan (MSB) from 0x18 to 0x1A */
    104 #define ITESIO_EC_SENSORVOLTBASE 	0x20 	/* Voltage from 0x20 to 0x28 */
    105 #define ITESIO_EC_SENSORTEMPBASE 	0x29 	/* Temperature from 0x29 to 0x2b */
    106 #define ITESIO_EC_SENSORVOLTEXTBASE 	0x2f 	/* Extra Voltage 0x2f */
    107 
    108 #define ITESIO_EC_VIN0 	0x20
    109 #define ITESIO_EC_VIN1 	0x21
    110 #define ITESIO_EC_VIN2 	0x22
    111 #define ITESIO_EC_VIN3 	0x23
    112 #define ITESIO_EC_VIN4 	0x24
    113 #define ITESIO_EC_VIN5 	0x25
    114 #define ITESIO_EC_VIN6 	0x26
    115 #define ITESIO_EC_VIN7 	0x27
    116 #define ITESIO_EC_VBAT 	0x28
    117 
    118 #define ITESIO_EC_UPDATEVBAT 	0x40 	/* Update VBAT voltage reading */
    119 #define ITESIO_EC_BEEPEER 	0x5c	/* Beep Event Enable Register */
    120 
    121 /* High and Low limits for voltages */
    122 #define ITESIO_EC_VIN0_HIGH_LIMIT 	0x30
    123 #define ITESIO_EC_VIN0_LOW_LIMIT 	0x31
    124 #define ITESIO_EC_VIN1_HIGH_LIMIT 	0x32
    125 #define ITESIO_EC_VIN1_LOW_LIMIT 	0x33
    126 #define ITESIO_EC_VIN2_HIGH_LIMIT 	0x34
    127 #define ITESIO_EC_VIN2_LOW_LIMIT 	0x35
    128 #define ITESIO_EC_VIN3_HIGH_LIMIT	0x36
    129 #define ITESIO_EC_VIN3_LOW_LIMIT 	0x37
    130 #define ITESIO_EC_VIN4_HIGH_LIMIT 	0x38
    131 #define ITESIO_EC_VIN4_LOW_LIMIT 	0x39
    132 #define ITESIO_EC_VIN5_HIGH_LIMIT 	0x3a
    133 #define ITESIO_EC_VIN5_LOW_LIMIT 	0x3b
    134 #define ITESIO_EC_VIN6_HIGH_LIMIT 	0x3c
    135 #define ITESIO_EC_VIN6_LOW_LIMIT 	0x3d
    136 #define ITESIO_EC_VIN7_HIGH_LIMIT 	0x3e
    137 #define ITESIO_EC_VIN7_LOW_LIMIT 	0x3f
    138 
    139 /* High and Low limits for temperatures */
    140 #define ITESIO_EC_TEMP0_HIGH_LIMIT	0x40
    141 #define ITESIO_EC_TEMP0_LOW_LIMIT	0x41
    142 #define ITESIO_EC_TEMP1_HIGH_LIMIT	0x42
    143 #define ITESIO_EC_TEMP1_LOW_LIMIT	0x43
    144 #define ITESIO_EC_TEMP2_HIGH_LIMIT	0x44
    145 #define ITESIO_EC_TEMP2_LOW_LIMIT	0x45
    146 
    147 #define IT8625_EC_SENSORFAN4_LSB	0x80
    148 #define IT8625_EC_SENSORFAN4_MSB	0x81
    149 #define IT8625_EC_SENSORFAN5_LSB	0x82
    150 #define IT8625_EC_SENSORFAN5_MSB	0x83
    151 #define IT8625_EC_SENSORFAN6_LSB	0x93
    152 #define IT8625_EC_SENSORFAN6_MSB	0x94
    153 
    154 #define ITESIO_EC_VREF			(4096) /* Vref = 4.096 V */
    155 
    156 struct itesio_softc;
    157 struct itesio_config {
    158 	uint16_t	chipid;
    159 	bool		no_wdt;
    160 	uint32_t	num_sensors;
    161 	uint32_t	voltstart_idx;
    162 	uint32_t	fanstart_idx;
    163 	void		(*setup_sensors)(struct itesio_softc *);
    164 	void		(*refresh_temp)(struct itesio_softc *,
    165 			    envsys_data_t *);
    166 	void		(*refresh_volts)(struct itesio_softc *,
    167 			    envsys_data_t *);
    168 	void		(*refresh_fans)(struct itesio_softc *,
    169 			    envsys_data_t *);
    170 };
    171 
    172 struct itesio_softc {
    173 	bus_space_tag_t 	sc_iot;
    174 
    175 	bus_space_handle_t 	sc_pnp_ioh;
    176 	bus_space_handle_t	sc_ec_ioh;
    177 
    178 	struct itesio_config	sc_config;
    179 
    180 	struct sysmon_wdog	sc_smw;
    181 	struct sysmon_envsys 	*sc_sme;
    182 	envsys_data_t 		*sc_sensor;
    183 
    184 	uint16_t 		sc_hwmon_baseaddr;
    185 	bool 			sc_hwmon_mapped;
    186 	bool 			sc_hwmon_enabled;
    187 	bool 			sc_wdt_enabled;
    188 
    189 	uint16_t 		sc_chipid;
    190 	uint8_t 		sc_devrev;
    191 };
    192 
    193 #endif /* _DEV_ISA_ITSIO_ISAVAR_H_ */
    194