| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRISelLowering.h | 42 LSR, ///< Logical shift right.
|
| /src/sys/arch/sandpoint/sandpoint/ |
| machdep.c | 566 #define LSR 5
601 unsigned lsr; local
607 lsr = UART_READ(LSR);
608 } while ((lsr & LSR_ANYE) || (lsr & LSR_RXREADY) == 0);
612 lsr = UART_READ(LSR);
613 } while ((lsr & LSR_RXREADY) == 0);
614 if (lsr & (LSR_BE | LSR_FE | LSR_PE))
627 unsigned lsr, timo; local
[all...] |
| satmgr.c | 187 #define LSR 5
453 unsigned lsr; local
458 lsr = CSR_READ(sc, LSR);
459 } while ((lsr & LSR_TXRDY) == 0);
653 case IIR_RLS: /* LSR updated */
673 int lsr, ch; local
675 lsr = CSR_READ(sc, LSR);
676 if (lsr & LSR_OE
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/Orc/ |
| OrcV2CBindings.cpp | 116 LLVMOrcLookupStateRef LSR = ::wrap(OrcV2CAPIHelper::extractLookupState(LS));
159 auto Err = unwrap(TryToGenerate(::wrap(this), Ctx, &LSR, CLookupKind,
164 OrcV2CAPIHelper::resetLookupState(LS, ::unwrap(LSR));
|
| /src/sys/arch/mmeye/mmeye/ |
| machdep.c | 581 #define LSR 5
611 tmp = INP(LSR);
635 while ((INP(LSR) & LSR_THRE) == 0)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 35 LSR,
56 case AArch64_AM::LSR: return "lsr";
77 case 1: return AArch64_AM::LSR;
92 /// 001 ==> lsr
105 case AArch64_AM::LSR: STEnc = 1; break;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 469 LSR,
|
| /src/external/gpl3/gdb.old/dist/sim/aarch64/ |
| decode.h | 117 LSR = 1,
|
| /src/external/gpl3/gdb/dist/sim/aarch64/ |
| decode.h | 117 LSR = 1,
|
| /src/sys/arch/sandpoint/stand/altboot/ |
| brdsetup.c | 88 #define LSR 5
1259 unsigned timo, lsr; local
1266 lsr = UART_READ(uart1base, LSR);
1267 } while (timo-- > 0 && (lsr & LSR_THRE) == 0);
1275 unsigned lsr; local
1278 lsr = UART_READ(uart1base, LSR);
1279 } while ((lsr & LSR_DRDY) == 0);
1287 return (UART_READ(uart1base, LSR) & LSR_DRDY) != 0
1511 unsigned lsr; local
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/arm/ |
| armemu.h | 45 #define LSR 1
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 465 return AArch64_AM::LSR;
2216 } else if (AArch64_AM::getShiftType(ShiftTypeAndValue) == AArch64_AM::LSR) {
2377 // LSR wD, wN, #Amt == UBFM wD, wN, #Amt, #32-1
2430 // LSL/LSR if the mask in NonZeroBits doesn't quite match up with the ISD::SHL
2678 SDNode *LSR = CurDAG->getMachineNode(
2687 SDValue Ops[] = {Dst, SDValue(LSR, 0),
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonConstPropagation.cpp | 2714 LatticeCell LSR;
2715 if (!evaluate(R, LR, LSR))
2717 RC.meet(LSR);
|
