| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| dsp_d0.s | 15 M1 = R0;
18 R0 = [ I3 ++ M1 ];
21 R0 = [ I3 ++ M1 ];
|
| dsp_d1.s | 13 M1 = 8 (X);
14 R0 = [ I0 ++ M1 ];
18 R0 = [ I0 ++ M1 ];
23 R0 = [ I0 ++ M1 ];
32 M1 = -4 (X);
33 R0 = [ I0 ++ M1 ];
37 R0 = [ I0 ++ M1 ];
41 R0 = [ I0 ++ M1 ];
45 R0 = [ I0 ++ M1 ];
49 R0 = [ I0 ++ M1 ];
[all...] |
| c_dspldst_ld_dr_ippm.s | 11 M1 = 0x4 (X);
21 R1 = [ I1 ++ M1 ];
24 R4 = [ I0 ++ M1 ];
39 R4 = [ I3 ++ M1 ];
42 R7 = [ I2 ++ M1 ];
54 M1 = 0x0 (X);
58 R3 = [ I1 ++ M1 ];
61 R6 = [ I0 ++ M1 ];
77 R6 = [ I3 ++ M1 ];
80 R1 = [ I2 ++ M1 ];
[all...] |
| c_dspldst_st_dr_ippm.s | 18 M1 = 0x4 (X);
28 [ I1 ++ M1 ] = R1;
31 [ I0 ++ M1 ] = R1;
39 [ I3 ++ M1 ] = R6;
42 [ I2 ++ M1 ] = R6;
51 R1 = [ I1 ++ M1 ];
54 R4 = [ I0 ++ M1 ];
69 R3 = [ I3 ++ M1 ];
72 R6 = [ I2 ++ M1 ];
|
| c_ldimmhalf_lz_ibml.s | 95 M1 = 0x300b (Z);
104 R5 = M1;
122 M1 = 0x5550 (Z);
130 R5 = M1;
147 M1 = 0xfee0 (Z);
155 R5 = M1;
|
| c_ldimmhalf_lzhi_ibml.s | 124 M1 = 0x300b (Z);
125 M1.H = 0x300a;
136 R5 = M1;
159 M1 = 0x5550 (Z);
160 M1.H = 0x5000;
170 R5 = M1;
192 M1 = 0xfee0 (Z);
193 M1.H = 0xe000;
203 R5 = M1;
|
| c_regmv_dr_imlb.s | 22 M1 = R0;
31 R5 = M1;
56 M1 = R1;
64 R5 = M1;
89 M1 = R2;
97 R5 = M1;
122 M1 = R3;
130 R5 = M1;
155 M1 = R4;
163 R5 = M1;
[all...] |
| c_regmv_pr_imlb.s | 23 M1 = P1;
31 R5 = M1;
49 M1 = P2;
57 R5 = M1;
75 M1 = P3;
83 R5 = M1;
101 M1 = P4;
109 R5 = M1;
127 M1 = P5;
135 R5 = M1;
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| dsp_d0.s | 15 M1 = R0;
18 R0 = [ I3 ++ M1 ];
21 R0 = [ I3 ++ M1 ];
|
| dsp_d1.s | 13 M1 = 8 (X);
14 R0 = [ I0 ++ M1 ];
18 R0 = [ I0 ++ M1 ];
23 R0 = [ I0 ++ M1 ];
32 M1 = -4 (X);
33 R0 = [ I0 ++ M1 ];
37 R0 = [ I0 ++ M1 ];
41 R0 = [ I0 ++ M1 ];
45 R0 = [ I0 ++ M1 ];
49 R0 = [ I0 ++ M1 ];
[all...] |
| c_dspldst_ld_dr_ippm.s | 11 M1 = 0x4 (X);
21 R1 = [ I1 ++ M1 ];
24 R4 = [ I0 ++ M1 ];
39 R4 = [ I3 ++ M1 ];
42 R7 = [ I2 ++ M1 ];
54 M1 = 0x0 (X);
58 R3 = [ I1 ++ M1 ];
61 R6 = [ I0 ++ M1 ];
77 R6 = [ I3 ++ M1 ];
80 R1 = [ I2 ++ M1 ];
[all...] |
| c_dspldst_st_dr_ippm.s | 18 M1 = 0x4 (X);
28 [ I1 ++ M1 ] = R1;
31 [ I0 ++ M1 ] = R1;
39 [ I3 ++ M1 ] = R6;
42 [ I2 ++ M1 ] = R6;
51 R1 = [ I1 ++ M1 ];
54 R4 = [ I0 ++ M1 ];
69 R3 = [ I3 ++ M1 ];
72 R6 = [ I2 ++ M1 ];
|
| c_ldimmhalf_lz_ibml.s | 95 M1 = 0x300b (Z);
104 R5 = M1;
122 M1 = 0x5550 (Z);
130 R5 = M1;
147 M1 = 0xfee0 (Z);
155 R5 = M1;
|
| c_ldimmhalf_lzhi_ibml.s | 124 M1 = 0x300b (Z);
125 M1.H = 0x300a;
136 R5 = M1;
159 M1 = 0x5550 (Z);
160 M1.H = 0x5000;
170 R5 = M1;
192 M1 = 0xfee0 (Z);
193 M1.H = 0xe000;
203 R5 = M1;
|
| c_regmv_dr_imlb.s | 22 M1 = R0;
31 R5 = M1;
56 M1 = R1;
64 R5 = M1;
89 M1 = R2;
97 R5 = M1;
122 M1 = R3;
130 R5 = M1;
155 M1 = R4;
163 R5 = M1;
[all...] |
| c_regmv_pr_imlb.s | 23 M1 = P1;
31 R5 = M1;
49 M1 = P2;
57 R5 = M1;
75 M1 = P3;
83 R5 = M1;
101 M1 = P4;
109 R5 = M1;
127 M1 = P5;
135 R5 = M1;
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| nouveau_nvkm_subdev_clk_nv04.c | 40 int N1, M1, N2, M2, P;
41 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);
45 pv->M1 = M1;
|
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| ConstraintSystem.cpp | 71 int64_t M1, M2, N;
73 ((-1) * Constraints[LowerR][1] / GCD), M1))
78 if (AddOverflow(M1, M2, N))
|
| /src/external/lgpl3/gmp/dist/mpn/generic/ |
| hgcd.c | 43 computing M1, and hgcd_matrix_adjust and hgcd_matrix_mul calls that use M1
44 (after this, the storage needed for M1 can be recycled).
46 Let S(r) denote the required storage. For M1 we need 4 * (ceil(n1/2) + 1)
126 struct hgcd_matrix M1;
132 mpn_hgcd_matrix_init(&M1, n - p, tp);
137 nn = mpn_hgcd (ap + p, bp + p, n - p, &M1, tp + scratch);
140 /* We always have max(M) > 2^{-(GMP_NUMB_BITS + 1)} max(M1) */
141 ASSERT (M->n + 2 >= M1.n);
144 then either q or q + 1 is a correct quotient, and M1 wil
[all...] |
| hgcd_appr.c | 175 struct hgcd_matrix1 M1;
178 if (mpn_hgcd2 (ap[1], ap[0], bp[1], bp[0], &M1))
180 /* Multiply M <- M * M1 */
181 mpn_hgcd_matrix_mul_1 (M, &M1, tp);
215 struct hgcd_matrix M1;
221 mpn_hgcd_matrix_init(&M1, n - p, tp);
222 if (mpn_hgcd_appr (ap + p, bp + p, n - p, &M1, tp + scratch))
224 /* We always have max(M) > 2^{-(GMP_NUMB_BITS + 1)} max(M1) */
225 ASSERT (M->n + 2 >= M1.n);
228 then either q or q + 1 is a correct quotient, and M1 wil
[all...] |
| hgcd_step.c | 79 struct hgcd_matrix1 M1;
113 if (mpn_hgcd2 (ah, al, bh, bl, &M1))
115 /* Multiply M <- M * M1 */
116 mpn_hgcd_matrix_mul_1 (M, &M1, tp);
120 /* Multiply M1^{-1} (a;b) */
121 return mpn_matrix22_mul1_inverse_vector (&M1, ap, tp, bp, n);
|
| hgcd_jacobi.c | 88 struct hgcd_matrix1 M1;
122 if (mpn_hgcd2_jacobi (ah, al, bh, bl, &M1, bitsp))
124 /* Multiply M <- M * M1 */
125 mpn_hgcd_matrix_mul_1 (M, &M1, tp);
129 /* Multiply M1^{-1} (a;b) */
130 return mpn_matrix22_mul1_inverse_vector (&M1, ap, tp, bp, n);
191 struct hgcd_matrix M1;
197 mpn_hgcd_matrix_init(&M1, n - p, tp);
198 nn = mpn_hgcd_jacobi (ap + p, bp + p, n - p, &M1, bitsp, tp + scratch);
201 /* We always have max(M) > 2^{-(GMP_NUMB_BITS + 1)} max(M1) */
[all...] |
| mod_34lsub1.c | 72 #define M1 ((CNST_LIMB(1) << B1) - 1)
82 #define LOW2(n) (((n) & M1) << B2)
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/devinit/ |
| nouveau_nvkm_subdev_devinit_nv50.c | 46 int N1, M1, N2, M2, P;
55 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
65 nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1);
74 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1);
78 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| nouveau_nvkm_subdev_fb_ramnv40.c | 45 int N1, M1, N2, M2;
54 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P);
62 ram->coef = (N1 << 8) | M1;
65 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
|
