| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| brevadd.s | 9 M2 = -4 (X);
12 I2 += M2 (BREV);
|
| d0.s | 26 M2 = 0 (X);
27 I2 += M2;
|
| c_dspldst_ld_dr_ippm.s | 12 M2 = 0x0 (X);
22 R2 = [ I2 ++ M2 ];
25 R5 = [ I1 ++ M2 ];
36 R1 = [ I0 ++ M2 ];
43 R0 = [ I3 ++ M2 ];
55 M2 = 0x4 (X);
59 R4 = [ I2 ++ M2 ];
62 R7 = [ I1 ++ M2 ];
74 R3 = [ I0 ++ M2 ];
81 R2 = [ I3 ++ M2 ];
[all...] |
| c_dspldst_st_dr_ippm.s | 19 M2 = 0x4 (X);
29 [ I2 ++ M2 ] = R2;
32 [ I1 ++ M2 ] = R2;
36 [ I0 ++ M2 ] = R3;
43 [ I3 ++ M2 ] = R7;
52 R2 = [ I2 ++ M2 ];
55 R5 = [ I1 ++ M2 ];
66 R0 = [ I0 ++ M2 ];
73 R7 = [ I3 ++ M2 ];
|
| c_ldimmhalf_lz_ibml.s | 96 M2 = 0x300d (Z);
105 R6 = M2;
123 M2 = 0x6660 (Z);
131 R6 = M2;
148 M2 = 0xfff0 (Z);
156 R6 = M2;
|
| c_ldimmhalf_lzhi_ibml.s | 126 M2 = 0x300d (Z);
127 M2.H = 0x300c;
137 R6 = M2;
161 M2 = 0x6660 (Z);
162 M2.H = 0x6000;
171 R6 = M2;
194 M2 = 0xfff0 (Z);
195 M2.H = 0xf000;
204 R6 = M2;
|
| c_regmv_dr_imlb.s | 23 M2 = R0;
32 R6 = M2;
57 M2 = R1;
65 R6 = M2;
90 M2 = R2;
98 R6 = M2;
123 M2 = R3;
131 R6 = M2;
156 M2 = R4;
164 R6 = M2;
[all...] |
| c_regmv_pr_imlb.s | 24 M2 = P1;
32 R6 = M2;
50 M2 = P2;
58 R6 = M2;
76 M2 = P3;
84 R6 = M2;
102 M2 = P4;
110 R6 = M2;
128 M2 = P5;
136 R6 = M2;
[all...] |
| c_ldimmhalf_pibml.s | 139 M2 = 0x7345 (X);
147 R2 = M2;
164 M2 = -234 (X);
172 R2 = M2;
189 M2 = 0x7ccc (X);
197 R2 = M2;
|
| c_regmv_dag_lz_dep.s | 78 M2 = R2;
79 M2 = 0xc1c2 (Z);
80 R2 = M2;
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| brevadd.s | 9 M2 = -4 (X);
12 I2 += M2 (BREV);
|
| d0.s | 26 M2 = 0 (X);
27 I2 += M2;
|
| c_dspldst_ld_dr_ippm.s | 12 M2 = 0x0 (X);
22 R2 = [ I2 ++ M2 ];
25 R5 = [ I1 ++ M2 ];
36 R1 = [ I0 ++ M2 ];
43 R0 = [ I3 ++ M2 ];
55 M2 = 0x4 (X);
59 R4 = [ I2 ++ M2 ];
62 R7 = [ I1 ++ M2 ];
74 R3 = [ I0 ++ M2 ];
81 R2 = [ I3 ++ M2 ];
[all...] |
| c_dspldst_st_dr_ippm.s | 19 M2 = 0x4 (X);
29 [ I2 ++ M2 ] = R2;
32 [ I1 ++ M2 ] = R2;
36 [ I0 ++ M2 ] = R3;
43 [ I3 ++ M2 ] = R7;
52 R2 = [ I2 ++ M2 ];
55 R5 = [ I1 ++ M2 ];
66 R0 = [ I0 ++ M2 ];
73 R7 = [ I3 ++ M2 ];
|
| c_ldimmhalf_lz_ibml.s | 96 M2 = 0x300d (Z);
105 R6 = M2;
123 M2 = 0x6660 (Z);
131 R6 = M2;
148 M2 = 0xfff0 (Z);
156 R6 = M2;
|
| c_ldimmhalf_lzhi_ibml.s | 126 M2 = 0x300d (Z);
127 M2.H = 0x300c;
137 R6 = M2;
161 M2 = 0x6660 (Z);
162 M2.H = 0x6000;
171 R6 = M2;
194 M2 = 0xfff0 (Z);
195 M2.H = 0xf000;
204 R6 = M2;
|
| c_regmv_dr_imlb.s | 23 M2 = R0;
32 R6 = M2;
57 M2 = R1;
65 R6 = M2;
90 M2 = R2;
98 R6 = M2;
123 M2 = R3;
131 R6 = M2;
156 M2 = R4;
164 R6 = M2;
[all...] |
| c_regmv_pr_imlb.s | 24 M2 = P1;
32 R6 = M2;
50 M2 = P2;
58 R6 = M2;
76 M2 = P3;
84 R6 = M2;
102 M2 = P4;
110 R6 = M2;
128 M2 = P5;
136 R6 = M2;
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| nouveau_nvkm_subdev_clk_nv04.c | 40 int N1, M1, N2, M2, P;
41 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);
47 pv->M2 = M2;
|
| nouveau_nvkm_subdev_clk_nv40.c | 67 int M2 = (coef & 0x00ff0000) >> 16;
76 if (M2)
77 khz = khz * N2 / M2;
130 int *N1, int *M1, int *N2, int *M2, int *log2P)
143 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P);
156 int N1, M1, N2, M2, log2P;
161 &N1, &M1, &N2, &M2, &log2P);
165 if (N2 == M2) {
170 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
|
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| ConstraintSystem.cpp | 71 int64_t M1, M2, N;
76 (Constraints[UpperR][1] / GCD), M2))
78 if (AddOverflow(M1, M2, N))
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/devinit/ |
| nouveau_nvkm_subdev_devinit_nv50.c | 46 int N1, M1, N2, M2, P;
55 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
67 (M2 << 16) | N2);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| nouveau_nvkm_subdev_fb_ramnv40.c | 45 int N1, M1, N2, M2;
54 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P);
60 if (N2 == M2) {
65 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
|
| /src/external/lgpl3/gmp/dist/mpn/generic/ |
| mod_34lsub1.c | 73 #define M2 ((CNST_LIMB(1) << B2) - 1)
79 #define LOW1(n) (((n) & M2) << B1)
|
| /src/sys/dev/isa/ |
| esp_isa.c | 191 #define M2 0x05
201 if (!((p1 == M1 && p2 == M2) || (p1 == M2 && p2 == M1)))
|
