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    Searched defs:MEM_MASK (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/sljit/dist/sljit_src/
sljitNativePPC_common.c 548 #define MEM_MASK 0x7f
739 ((inst) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
743 (((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
879 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
889 inst = data_transfer_insts[inp_flags & MEM_MASK];
904 inst = data_transfer_insts[inp_flags & MEM_MASK];
975 tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
999 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
1007 inst = data_transfer_insts[inp_flags & MEM_MASK];
1076 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
    [all...]
sljitNativeSPARC_common.c 415 #define MEM_MASK 0x1f
536 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK]
537 | ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg))
539 ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS));
593 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base && reg != OFFS_REG(arg))
614 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base)
622 dest = ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg));
623 delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS;
625 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay_slot);
627 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot)
    [all...]
sljitNativeMIPS_common.c 511 #define MEM_MASK 0x1f
711 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK)
712 | TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
754 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
767 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
775 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
782 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
785 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
803 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
826 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot)
    [all...]
sljitNativeTILEGX_64.c 89 #define MEM_MASK 0x1f
1303 FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, ADDR_TMP_mapped));
1305 FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], ADDR_TMP_mapped, reg_ar));
1352 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA))
1373 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
1375 return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
1384 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
1386 return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
1391 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
1393 return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar)
    [all...]

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