NetBSD Cross-Reference & Source Code Search Engine

Home	Sort by: relevance \| last modified time \| path

Full Search

in project(s):

Definition

Symbol

File Path

History

| | Help

Searched defs:MT32 (Results 1 - 7 of 7) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
micromips-opc.c	276 #define MT32 ASE_MT 566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 577 {"cttc2", "t,G", 0x00000456, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 652 {"dmt", "", 0x0000057c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 653 {"dmt", "t", 0x0000057c, 0xfc1fffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 712 {"dvpe", "", 0x0000157c, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
mips-opc.c	393 #define MT32 ASE_MT 989 {"cftc1", "d,y", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 990 {"cftc1", "d,T", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 991 {"cftc2", "d,y", 0x41000025, 0xffe007ff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1006 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 1007 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 1008 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1113 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 1114 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 1187 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
micromips-opc.c	276 #define MT32 ASE_MT 566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 577 {"cttc2", "t,G", 0x00000456, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 652 {"dmt", "", 0x0000057c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 653 {"dmt", "t", 0x0000057c, 0xfc1fffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 712 {"dvpe", "", 0x0000157c, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
mips-opc.c	393 #define MT32 ASE_MT 989 {"cftc1", "d,y", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 990 {"cftc1", "d,T", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 991 {"cftc2", "d,y", 0x41000025, 0xffe007ff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1006 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 1007 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 1008 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1113 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 1114 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 1187 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
/src/external/gpl3/gdb/dist/opcodes/
micromips-opc.c	276 #define MT32 ASE_MT 566 {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 567 {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 568 {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 577 {"cttc2", "t,G", 0x00000456, 0xfc00ffff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, 0 }, 652 {"dmt", "", 0x0000057c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 653 {"dmt", "t", 0x0000057c, 0xfc1fffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 712 {"dvpe", "", 0x0000157c, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
mips-opc.c	393 #define MT32 ASE_MT 989 {"cftc1", "d,y", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 990 {"cftc1", "d,T", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, AL, 0, MT32, 0 }, 991 {"cftc2", "d,y", 0x41000025, 0xffe007ff, WR_1\|RD_C2\|TRAP\|LC, AL, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1006 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 1007 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, 0 }, 1008 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, AL, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1113 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 1114 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 1187 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
mips-opc.c	392 #define MT32 ASE_MT 988 {"cftc1", "d,y", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, 0, 0, MT32, 0 }, 989 {"cftc1", "d,T", 0x41000023, 0xffe007ff, WR_1\|RD_C1\|TRAP\|LC, 0, 0, MT32, 0 }, 990 {"cftc2", "d,y", 0x41000025, 0xffe007ff, WR_1\|RD_C2\|TRAP\|LC, 0, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1005 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, 0, 0, MT32, 0 }, 1006 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, 0, 0, MT32, 0 }, 1007 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1\|WR_CC\|TRAP\|CM, 0, 0, MT32, IOCT\|IOCTP\|IOCT2 }, 1109 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 }, 1110 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1\|TRAP, 0, 0, MT32, 0 }, 1186 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 } [all...]

Completed in 38 milliseconds