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      1 /* $NetBSD: extern.h,v 1.5 2022/09/05 14:14:42 tsutsui Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2003 Naoto Shimazaki.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY NAOTO SHIMAZAKI AND CONTRIBUTORS ``AS IS''
     17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     18  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE NAOTO OR CONTRIBUTORS BE
     20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     26  * THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #ifndef _LOCORE
     30 #include <sys/types.h>
     31 
     32 #include <netinet/in.h>
     33 #include <netinet/in_systm.h>
     34 
     35 #include <lib/libsa/net.h>
     36 #include <lib/libsa/netif.h>
     37 
     38 #include <mips/cpuregs.h>
     39 
     40 #include <dev/ic/comreg.h>
     41 #include <dev/ic/ns16550reg.h>
     42 #include <dev/ic/st16650reg.h>
     43 #define com_lcr com_cfcr
     44 
     45 struct bootmenu_command {
     46 	const char	*c_name;
     47 	void (*c_fn)(char*);
     48 };
     49 
     50 #define BOOTOPT_MAGIC	0x4c43424fU	/* LCBO */
     51 #define B_F_USE_BOOTP	0x00000001
     52 
     53 struct boot_option {
     54 	u_int32_t	b_magic;
     55 	u_int32_t	b_flags;
     56 	struct in_addr	b_remote_ip;
     57 	struct in_addr	b_local_ip;
     58 	struct in_addr	b_gate_ip;
     59 	u_long		b_netmask;
     60 	char		b_pathname[FNAME_SIZE];
     61 };
     62 
     63 #define ROMCS0_BASE	0xbe000000U
     64 #define ROMCS3_BASE	0xbf800000U
     65 #define FLASH_BASE	ROMCS0_BASE
     66 #define BOOTOPTS_BASE	0xbfd20000U
     67 
     68 /* ElapsedTime registers */
     69 #define VRETIMEL	0x0b0000c0
     70 #define VRETIMEM	0x0b0000c2
     71 #define VRETIMEH	0x0b0000c4
     72 
     73 #ifdef ROMICE
     74 #define KERN_ROMBASE	0x80800000U
     75 #else
     76 #define KERN_ROMBASE	0xbf800000U
     77 #endif
     78 
     79 #define __REG_1(reg)	*((volatile u_int8_t*) (reg))
     80 #define __REG_2(reg)	*((volatile u_int16_t*) (reg))
     81 #define __REG_4(reg)	*((volatile u_int32_t*) (reg))
     82 
     83 #define REGWRITE_1(base, off, val)	\
     84 		(__REG_1(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
     85 		 = (val))
     86 #define REGWRITE_2(base, off, val)	\
     87 		(__REG_2(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
     88 		 = (val))
     89 #define REGWRITE_4(base, off, val)	\
     90 		(__REG_4(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
     91 		 = (val))
     92 
     93 #define REGREAD_1(base, off)	\
     94 		(__REG_1(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
     95 #define REGREAD_2(base, off)	\
     96 		(__REG_2(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
     97 #define REGREAD_4(base, off)	\
     98 		(__REG_4(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
     99 
    100 #define ISKEY	ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_RXRDY)
    101 
    102 #define bus_space_write_1(iot, ioh, off, val)	REGWRITE_1((ioh), (off), (val))
    103 #define bus_space_write_2(iot, ioh, off, val)	REGWRITE_2((ioh), (off), (val))
    104 #define bus_space_write_4(iot, ioh, off, val)	REGWRITE_4((ioh), (off), (val))
    105 #define bus_space_read_1(iot, ioh, off)	REGREAD_1((ioh), (off))
    106 #define bus_space_read_2(iot, ioh, off)	REGREAD_2((ioh), (off))
    107 #define bus_space_read_4(iot, ioh, off)	REGREAD_4((ioh), (off))
    108 typedef void		*bus_space_tag_t;
    109 typedef u_int32_t	bus_space_handle_t;
    110 typedef size_t		bus_size_t;
    111 
    112 extern struct netif_driver	cs_driver;
    113 extern struct boot_option	bootopts;
    114 
    115 void comcninit(void);
    116 int iskey(void);
    117 void start_netbsd(void);
    118 int i28f128_probe(void *base);
    119 int i28f128_region_write(void *dst, const void *src, size_t len);
    120 
    121 /* dev_flash */
    122 int flash_strategy(void *, int, daddr_t, size_t, void *, size_t *);
    123 int flash_open(struct open_file *, ...);
    124 int flash_close(struct open_file *);
    125 int flash_ioctl(struct open_file *, u_long, void *);
    126 
    127 /* dev_net */
    128 int net_strategy(void *, int, daddr_t, size_t, void *, size_t *);
    129 int net_open(struct open_file *, ...);
    130 int net_close(struct open_file *);
    131 int net_ioctl(struct open_file *, u_long, void *);
    132 
    133 #endif /* !_LOCORE */
    134 
    135 #define	LCBOOT_STARTADDR	0x80001000
    136 #define	LCBOOT_ROMSTARTADDR	0xbfd01000
    137 #define	NETBSD_STARTADDR	0x80040000
    138