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      1 /*	$NetBSD: omap4.h,v 1.1.1.3 2021/11/07 16:49:58 jmcneill Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0-only */
      4 /*
      5  * Copyright 2017 Texas Instruments, Inc.
      6  */
      7 #ifndef __DT_BINDINGS_CLK_OMAP4_H
      8 #define __DT_BINDINGS_CLK_OMAP4_H
      9 
     10 #define OMAP4_CLKCTRL_OFFSET	0x20
     11 #define OMAP4_CLKCTRL_INDEX(offset)	((offset) - OMAP4_CLKCTRL_OFFSET)
     12 
     13 /* mpuss clocks */
     14 #define OMAP4_MPU_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     15 
     16 /* tesla clocks */
     17 #define OMAP4_DSP_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     18 
     19 /* abe clocks */
     20 #define OMAP4_L4_ABE_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     21 #define OMAP4_AESS_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     22 #define OMAP4_MCPDM_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
     23 #define OMAP4_DMIC_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x38)
     24 #define OMAP4_MCASP_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x40)
     25 #define OMAP4_MCBSP1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x48)
     26 #define OMAP4_MCBSP2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x50)
     27 #define OMAP4_MCBSP3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x58)
     28 #define OMAP4_SLIMBUS1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x60)
     29 #define OMAP4_TIMER5_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x68)
     30 #define OMAP4_TIMER6_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x70)
     31 #define OMAP4_TIMER7_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x78)
     32 #define OMAP4_TIMER8_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x80)
     33 #define OMAP4_WD_TIMER3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x88)
     34 
     35 /* l4_ao clocks */
     36 #define OMAP4_SMARTREFLEX_MPU_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     37 #define OMAP4_SMARTREFLEX_IVA_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
     38 #define OMAP4_SMARTREFLEX_CORE_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x38)
     39 
     40 /* l3_1 clocks */
     41 #define OMAP4_L3_MAIN_1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     42 
     43 /* l3_2 clocks */
     44 #define OMAP4_L3_MAIN_2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     45 #define OMAP4_GPMC_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     46 #define OMAP4_OCMC_RAM_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
     47 
     48 /* ducati clocks */
     49 #define OMAP4_IPU_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     50 
     51 /* l3_dma clocks */
     52 #define OMAP4_DMA_SYSTEM_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     53 
     54 /* l3_emif clocks */
     55 #define OMAP4_DMM_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     56 #define OMAP4_EMIF1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
     57 #define OMAP4_EMIF2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x38)
     58 
     59 /* d2d clocks */
     60 #define OMAP4_C2C_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     61 
     62 /* l4_cfg clocks */
     63 #define OMAP4_L4_CFG_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     64 #define OMAP4_SPINLOCK_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     65 #define OMAP4_MAILBOX_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
     66 
     67 /* l3_instr clocks */
     68 #define OMAP4_L3_MAIN_3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     69 #define OMAP4_L3_INSTR_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     70 #define OMAP4_OCP_WP_NOC_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x40)
     71 
     72 /* ivahd clocks */
     73 #define OMAP4_IVA_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     74 #define OMAP4_SL2IF_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     75 
     76 /* iss clocks */
     77 #define OMAP4_ISS_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     78 #define OMAP4_FDIF_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     79 
     80 /* l3_dss clocks */
     81 #define OMAP4_DSS_CORE_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     82 
     83 /* l3_gfx clocks */
     84 #define OMAP4_GPU_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
     85 
     86 /* l3_init clocks */
     87 #define OMAP4_MMC1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     88 #define OMAP4_MMC2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
     89 #define OMAP4_HSI_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x38)
     90 #define OMAP4_USB_HOST_HS_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x58)
     91 #define OMAP4_USB_OTG_HS_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x60)
     92 #define OMAP4_USB_TLL_HS_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x68)
     93 #define OMAP4_USB_HOST_FS_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xd0)
     94 #define OMAP4_OCP2SCP_USB_PHY_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xe0)
     95 
     96 /* l4_per clocks */
     97 #define OMAP4_TIMER10_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x28)
     98 #define OMAP4_TIMER11_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
     99 #define OMAP4_TIMER2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x38)
    100 #define OMAP4_TIMER3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x40)
    101 #define OMAP4_TIMER4_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x48)
    102 #define OMAP4_TIMER9_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x50)
    103 #define OMAP4_ELM_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x58)
    104 #define OMAP4_GPIO2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x60)
    105 #define OMAP4_GPIO3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x68)
    106 #define OMAP4_GPIO4_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x70)
    107 #define OMAP4_GPIO5_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x78)
    108 #define OMAP4_GPIO6_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x80)
    109 #define OMAP4_HDQ1W_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x88)
    110 #define OMAP4_I2C1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xa0)
    111 #define OMAP4_I2C2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xa8)
    112 #define OMAP4_I2C3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xb0)
    113 #define OMAP4_I2C4_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xb8)
    114 #define OMAP4_L4_PER_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xc0)
    115 #define OMAP4_MCBSP4_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xe0)
    116 #define OMAP4_MCSPI1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xf0)
    117 #define OMAP4_MCSPI2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0xf8)
    118 #define OMAP4_MCSPI3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x100)
    119 #define OMAP4_MCSPI4_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x108)
    120 #define OMAP4_MMC3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x120)
    121 #define OMAP4_MMC4_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x128)
    122 #define OMAP4_SLIMBUS2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x138)
    123 #define OMAP4_UART1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x140)
    124 #define OMAP4_UART2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x148)
    125 #define OMAP4_UART3_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x150)
    126 #define OMAP4_UART4_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x158)
    127 #define OMAP4_MMC5_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x160)
    128 
    129 /* l4_secure clocks */
    130 #define OMAP4_L4_SECURE_CLKCTRL_OFFSET	0x1a0
    131 #define OMAP4_L4_SECURE_CLKCTRL_INDEX(offset)	((offset) - OMAP4_L4_SECURE_CLKCTRL_OFFSET)
    132 #define OMAP4_AES1_CLKCTRL	OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1a0)
    133 #define OMAP4_AES2_CLKCTRL	OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1a8)
    134 #define OMAP4_DES3DES_CLKCTRL	OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1b0)
    135 #define OMAP4_PKA_CLKCTRL	OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1b8)
    136 #define OMAP4_RNG_CLKCTRL	OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1c0)
    137 #define OMAP4_SHA2MD5_CLKCTRL	OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1c8)
    138 #define OMAP4_CRYPTODMA_CLKCTRL	OMAP4_L4_SECURE_CLKCTRL_INDEX(0x1d8)
    139 
    140 /* l4_wkup clocks */
    141 #define OMAP4_L4_WKUP_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
    142 #define OMAP4_WD_TIMER2_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x30)
    143 #define OMAP4_GPIO1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x38)
    144 #define OMAP4_TIMER1_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x40)
    145 #define OMAP4_COUNTER_32K_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x50)
    146 #define OMAP4_KBD_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x78)
    147 
    148 /* emu_sys clocks */
    149 #define OMAP4_DEBUGSS_CLKCTRL	OMAP4_CLKCTRL_INDEX(0x20)
    150 
    151 #endif
    152