| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFISelDAGToDAG.cpp | 162 SDValue Op0, Op1;
167 if (!SelectAddr(Op, Op0, Op1))
175 OutOps.push_back(Op1);
264 SDValue OP1 = LDAddrNode->getOperand(0);
268 SDNode *OP1N = OP1.getNode();
284 SDValue OP1 = LDAddrNode->getOperand(0);
286 dyn_cast<GlobalAddressSDNode>(OP1.getNode()))
|
| /src/external/gpl3/binutils/dist/include/opcode/ |
| tic6x-opcode-table.h | 42 #define OP1(a) 1, { a }
496 OP1(OLCST),
500 OP1(ORXREG1),
504 OP1(ORIRP1),
508 OP1(ORNRP1),
580 OP1(OLCST),
585 OP1(ORXREG1),
590 OP1(ORIRP1),
595 OP1(ORNRP1),
632 OP1(OLCST)
[all...] |
| /src/external/gpl3/binutils.old/dist/include/opcode/ |
| tic6x-opcode-table.h | 42 #define OP1(a) 1, { a }
496 OP1(OLCST),
500 OP1(ORXREG1),
504 OP1(ORIRP1),
508 OP1(ORNRP1),
580 OP1(OLCST),
585 OP1(ORXREG1),
590 OP1(ORIRP1),
595 OP1(ORNRP1),
632 OP1(OLCST)
[all...] |
| /src/external/gpl3/gdb.old/dist/include/opcode/ |
| tic6x-opcode-table.h | 42 #define OP1(a) 1, { a }
496 OP1(OLCST),
500 OP1(ORXREG1),
504 OP1(ORIRP1),
508 OP1(ORNRP1),
580 OP1(OLCST),
585 OP1(ORXREG1),
590 OP1(ORIRP1),
595 OP1(ORNRP1),
632 OP1(OLCST)
[all...] |
| /src/external/gpl3/gdb/dist/include/opcode/ |
| tic6x-opcode-table.h | 42 #define OP1(a) 1, { a }
496 OP1(OLCST),
500 OP1(ORXREG1),
504 OP1(ORIRP1),
508 OP1(ORNRP1),
580 OP1(OLCST),
585 OP1(ORXREG1),
590 OP1(ORIRP1),
595 OP1(ORNRP1),
632 OP1(OLCST)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| R600Defines.h | 38 OP1 = (1 << 10),
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| aarch64-tbl.h | 32 #define OP1(a) {OPND(a)}
73 /* e.g. SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}. */
79 /* e.g. SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2>. */
85 /* e.g. SYSP #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>, <Xt+1>}. */
4356 CORE_INSN ("b", 0x14000000, 0xfc000000, branch_imm, OP_B, OP1 (ADDR_PCREL26), QL_PCREL_26, F_SUBCLASS_OTHER),
4357 CORE_INSN ("bl", 0x94000000, 0xfc000000, branch_imm, OP_BL, OP1 (ADDR_PCREL26), QL_PCREL_26, F_BRANCH_CALL),
4359 CORE_INSN ("br", 0xd61f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER),
4360 CORE_INSN ("blr", 0xd63f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_CALL),
4361 CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_RET | F_OPD0_OPT | F_DEFAULT (30)),
4368 PAUTH_INSN ("braaz", 0xd61f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER)
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| aarch64-tbl.h | 32 #define OP1(a) {OPND(a)}
73 /* e.g. SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}. */
79 /* e.g. SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2>. */
85 /* e.g. SYSP #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>, <Xt+1>}. */
4136 CORE_INSN ("b", 0x14000000, 0xfc000000, branch_imm, OP_B, OP1 (ADDR_PCREL26), QL_PCREL_26, F_SUBCLASS_OTHER),
4137 CORE_INSN ("bl", 0x94000000, 0xfc000000, branch_imm, OP_BL, OP1 (ADDR_PCREL26), QL_PCREL_26, F_BRANCH_CALL),
4139 CORE_INSN ("br", 0xd61f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER),
4140 CORE_INSN ("blr", 0xd63f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_CALL),
4141 CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_RET | F_OPD0_OPT | F_DEFAULT (30)),
4148 PAUTH_INSN ("braaz", 0xd61f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER)
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| aarch64-tbl.h | 32 #define OP1(a) {OPND(a)}
73 /* e.g. SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}. */
79 /* e.g. SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2>. */
85 /* e.g. SYSP #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>, <Xt+1>}. */
3898 CORE_INSN ("b", 0x14000000, 0xfc000000, branch_imm, OP_B, OP1 (ADDR_PCREL26), QL_PCREL_26, F_SUBCLASS_OTHER),
3899 CORE_INSN ("bl", 0x94000000, 0xfc000000, branch_imm, OP_BL, OP1 (ADDR_PCREL26), QL_PCREL_26, F_BRANCH_CALL),
3901 CORE_INSN ("br", 0xd61f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER),
3902 CORE_INSN ("blr", 0xd63f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_CALL),
3903 CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_RET | F_OPD0_OPT | F_DEFAULT (30)),
3910 PAUTH_INSN ("braaz", 0xd61f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER)
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| aarch64-tbl.h | 32 #define OP1(a) {OPND(a)}
73 /* e.g. SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}. */
79 /* e.g. SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2>. */
85 /* e.g. SYSP #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>, <Xt+1>}. */
4136 CORE_INSN ("b", 0x14000000, 0xfc000000, branch_imm, OP_B, OP1 (ADDR_PCREL26), QL_PCREL_26, F_SUBCLASS_OTHER),
4137 CORE_INSN ("bl", 0x94000000, 0xfc000000, branch_imm, OP_BL, OP1 (ADDR_PCREL26), QL_PCREL_26, F_BRANCH_CALL),
4139 CORE_INSN ("br", 0xd61f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER),
4140 CORE_INSN ("blr", 0xd63f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_CALL),
4141 CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_RET | F_OPD0_OPT | F_DEFAULT (30)),
4148 PAUTH_INSN ("braaz", 0xd61f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, F_SUBCLASS_OTHER)
[all...] |
