| /src/crypto/external/bsd/heimdal/dist/lib/roken/ |
| flock.c | 42 #define OP_MASK (LOCK_SH | LOCK_EX | LOCK_UN)
61 switch (operation & OP_MASK) {
108 switch (operation & OP_MASK) {
|
| /src/usr.sbin/mountd/ |
| mountd.h | 38 #define OP_MASK 0x008
|
| /src/sys/arch/hpcmips/dev/ |
| mq200machdep.c | 56 #define OP_MASK OP_(2)
230 case OP_MASK:
258 if (ops[0] != OP_MASK)
|
| /src/crypto/external/apache2/openssl/dist/fuzz/ |
| hashtable.c | 63 #define OP_MASK 0x3f
65 #define OPERATION(x) (((x) & OP_MASK) % OP_END)
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| alpha-opc.c | 339 #define OP_MASK 0xFC000000
343 #define BRA_MASK OP_MASK
348 #define FP_MASK (OP_MASK | 0xFFE0)
353 #define MEM_MASK OP_MASK
358 #define MFC_MASK (OP_MASK | 0xFFFF)
363 #define MBR_MASK (OP_MASK | 0xC000)
370 #define OPR_MASK (OP_MASK | 0x1FE0)
376 #define PCD_MASK OP_MASK
386 #define EV4HWMEM_MASK (OP_MASK | 0xF000)
390 #define EV5HWMEM_MASK (OP_MASK | 0xF800
[all...] |
| v850-opc.c | 29 #define OP_MASK OP (0x3f)
1339 { "add", OP (0x0e), OP_MASK, IF1, 0, PROCESSOR_ALL },
1340 { "add", OP (0x12), OP_MASK, IF2, 0, PROCESSOR_ALL },
1342 { "addi", OP (0x30), OP_MASK, IF6, 0, PROCESSOR_ALL },
1346 { "and", OP (0x0a), OP_MASK, IF1, 0, PROCESSOR_ALL },
1348 { "andi", OP (0x36), OP_MASK, IF6U, 0, PROCESSOR_ALL },
1457 { "cmp", OP (0x0f), OP_MASK, IF1, 0, PROCESSOR_ALL },
1458 { "cmp", OP (0x13), OP_MASK, IF2, 0, PROCESSOR_ALL },
1482 { "divh", OP (0x02), OP_MASK, {R1_NOTR0, R2_NOTR0}, 0, PROCESSOR_ALL },
1623 { "mov", OP (0x00), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }
[all...] |
| ppc-opc.c | 4064 #define OP_MASK OP (0x3f)
4091 #define P_D_MASK (((-1ULL << 50) & ~PCREL_MASK) | OP_MASK)
4094 #define P_D_SI32_MASK (((-1ULL << 48) & ~PCREL_MASK) | OP_MASK)
4129 #define OPTO_MASK (OP_MASK | TO_MASK)
4274 #define DRA_MASK (OP_MASK | RA_MASK)
4371 (OP_MASK \
5196 {"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}},
5228 {"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}},
5229 {"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}},
6185 {"mulli", OP(7), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| alpha-opc.c | 339 #define OP_MASK 0xFC000000
343 #define BRA_MASK OP_MASK
348 #define FP_MASK (OP_MASK | 0xFFE0)
353 #define MEM_MASK OP_MASK
358 #define MFC_MASK (OP_MASK | 0xFFFF)
363 #define MBR_MASK (OP_MASK | 0xC000)
370 #define OPR_MASK (OP_MASK | 0x1FE0)
376 #define PCD_MASK OP_MASK
386 #define EV4HWMEM_MASK (OP_MASK | 0xF000)
390 #define EV5HWMEM_MASK (OP_MASK | 0xF800
[all...] |
| v850-opc.c | 29 #define OP_MASK OP (0x3f)
1339 { "add", OP (0x0e), OP_MASK, IF1, 0, PROCESSOR_ALL },
1340 { "add", OP (0x12), OP_MASK, IF2, 0, PROCESSOR_ALL },
1342 { "addi", OP (0x30), OP_MASK, IF6, 0, PROCESSOR_ALL },
1346 { "and", OP (0x0a), OP_MASK, IF1, 0, PROCESSOR_ALL },
1348 { "andi", OP (0x36), OP_MASK, IF6U, 0, PROCESSOR_ALL },
1457 { "cmp", OP (0x0f), OP_MASK, IF1, 0, PROCESSOR_ALL },
1458 { "cmp", OP (0x13), OP_MASK, IF2, 0, PROCESSOR_ALL },
1482 { "divh", OP (0x02), OP_MASK, {R1_NOTR0, R2_NOTR0}, 0, PROCESSOR_ALL },
1623 { "mov", OP (0x00), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }
[all...] |
| ppc-opc.c | 4063 #define OP_MASK OP (0x3f)
4090 #define P_D_MASK (((-1ULL << 50) & ~PCREL_MASK) | OP_MASK)
4093 #define P_D_SI32_MASK (((-1ULL << 48) & ~PCREL_MASK) | OP_MASK)
4128 #define OPTO_MASK (OP_MASK | TO_MASK)
4273 #define DRA_MASK (OP_MASK | RA_MASK)
4370 (OP_MASK \
5180 {"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}},
5212 {"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}},
5213 {"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}},
6157 {"mulli", OP(7), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| alpha-opc.c | 339 #define OP_MASK 0xFC000000
343 #define BRA_MASK OP_MASK
348 #define FP_MASK (OP_MASK | 0xFFE0)
353 #define MEM_MASK OP_MASK
358 #define MFC_MASK (OP_MASK | 0xFFFF)
363 #define MBR_MASK (OP_MASK | 0xC000)
370 #define OPR_MASK (OP_MASK | 0x1FE0)
376 #define PCD_MASK OP_MASK
386 #define EV4HWMEM_MASK (OP_MASK | 0xF000)
390 #define EV5HWMEM_MASK (OP_MASK | 0xF800
[all...] |
| v850-opc.c | 29 #define OP_MASK OP (0x3f)
1339 { "add", OP (0x0e), OP_MASK, IF1, 0, PROCESSOR_ALL },
1340 { "add", OP (0x12), OP_MASK, IF2, 0, PROCESSOR_ALL },
1342 { "addi", OP (0x30), OP_MASK, IF6, 0, PROCESSOR_ALL },
1346 { "and", OP (0x0a), OP_MASK, IF1, 0, PROCESSOR_ALL },
1348 { "andi", OP (0x36), OP_MASK, IF6U, 0, PROCESSOR_ALL },
1457 { "cmp", OP (0x0f), OP_MASK, IF1, 0, PROCESSOR_ALL },
1458 { "cmp", OP (0x13), OP_MASK, IF2, 0, PROCESSOR_ALL },
1482 { "divh", OP (0x02), OP_MASK, {R1_NOTR0, R2_NOTR0}, 0, PROCESSOR_ALL },
1623 { "mov", OP (0x00), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }
[all...] |
| ppc-opc.c | 3979 #define OP_MASK OP (0x3f)
4006 #define P_D_MASK (((-1ULL << 50) & ~PCREL_MASK) | OP_MASK)
4038 #define OPTO_MASK (OP_MASK | TO_MASK)
4183 #define DRA_MASK (OP_MASK | RA_MASK)
4280 (OP_MASK \
5061 {"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}},
5093 {"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}},
5094 {"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}},
6038 {"mulli", OP(7), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
6039 {"muli", OP(7), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| alpha-opc.c | 339 #define OP_MASK 0xFC000000
343 #define BRA_MASK OP_MASK
348 #define FP_MASK (OP_MASK | 0xFFE0)
353 #define MEM_MASK OP_MASK
358 #define MFC_MASK (OP_MASK | 0xFFFF)
363 #define MBR_MASK (OP_MASK | 0xC000)
370 #define OPR_MASK (OP_MASK | 0x1FE0)
376 #define PCD_MASK OP_MASK
386 #define EV4HWMEM_MASK (OP_MASK | 0xF000)
390 #define EV5HWMEM_MASK (OP_MASK | 0xF800
[all...] |
| v850-opc.c | 29 #define OP_MASK OP (0x3f)
1339 { "add", OP (0x0e), OP_MASK, IF1, 0, PROCESSOR_ALL },
1340 { "add", OP (0x12), OP_MASK, IF2, 0, PROCESSOR_ALL },
1342 { "addi", OP (0x30), OP_MASK, IF6, 0, PROCESSOR_ALL },
1346 { "and", OP (0x0a), OP_MASK, IF1, 0, PROCESSOR_ALL },
1348 { "andi", OP (0x36), OP_MASK, IF6U, 0, PROCESSOR_ALL },
1457 { "cmp", OP (0x0f), OP_MASK, IF1, 0, PROCESSOR_ALL },
1458 { "cmp", OP (0x13), OP_MASK, IF2, 0, PROCESSOR_ALL },
1482 { "divh", OP (0x02), OP_MASK, {R1_NOTR0, R2_NOTR0}, 0, PROCESSOR_ALL },
1623 { "mov", OP (0x00), OP_MASK, {R1, R2_NOTR0}, 0, PROCESSOR_ALL }
[all...] |
| ppc-opc.c | 3979 #define OP_MASK OP (0x3f)
4006 #define P_D_MASK (((-1ULL << 50) & ~PCREL_MASK) | OP_MASK)
4038 #define OPTO_MASK (OP_MASK | TO_MASK)
4183 #define DRA_MASK (OP_MASK | RA_MASK)
4280 (OP_MASK \
5061 {"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}},
5093 {"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}},
5094 {"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}},
6038 {"mulli", OP(7), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
6039 {"muli", OP(7), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}}
[all...] |
| /src/external/gpl3/gdb/dist/gdb/ |
| rs6000-tdep.c | 835 #define OP_MASK 0xfc000000
913 if ((insn & OP_MASK) == 1 << 26)
978 opcode = insn & OP_MASK;
1162 if ((insn & OP_MASK) == 1 << 26)
1171 if ((insn & OP_MASK) == BC_INSN)
|
| /src/external/gpl3/gdb.old/dist/gdb/ |
| rs6000-tdep.c | 835 #define OP_MASK 0xfc000000
913 if ((insn & OP_MASK) == 1 << 26)
978 opcode = insn & OP_MASK;
1162 if ((insn & OP_MASK) == 1 << 26)
1171 if ((insn & OP_MASK) == BC_INSN)
|
