| /src/external/apache2/llvm/dist/llvm/lib/MC/ |
| MCInstrInfo.cpp | 17 unsigned Opcode = MI.getOpcode();
18 if (ComplexDeprecationInfos && ComplexDeprecationInfos[Opcode])
19 return ComplexDeprecationInfos[Opcode](MI, STI, Info);
20 if (DeprecatedFeatures && DeprecatedFeatures[Opcode] != uint8_t(-1U) &&
21 STI.getFeatureBits()[DeprecatedFeatures[Opcode]]) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64ExpandImm.h | 23 unsigned Opcode;
|
| AArch64SelectionDAGInfo.cpp | 128 unsigned Opcode;
132 Opcode = ZeroData ? AArch64::STZGloop : AArch64::STGloop;
134 Opcode = ZeroData ? AArch64::STZGloop_wback : AArch64::STGloop_wback;
137 SDNode *St = DAG.getMachineNode(Opcode, dl, ResTys, Ops);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| Thumb1InstrInfo.cpp | 150 unsigned Opcode = N->getMachineOpcode();
151 if (Opcode == ARM::tADCS || Opcode == ARM::tSBCS)
|
| ARMHazardRecognizer.cpp | 33 unsigned Opcode = MCID.getOpcode();
34 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| AVRInstPrinter.cpp | 38 unsigned Opcode = MI->getOpcode();
43 switch (Opcode) {
51 if (Opcode == AVR::LDRdPtrPd)
56 if (Opcode == AVR::LDRdPtrPi)
69 if (Opcode == AVR::STPtrPdRr)
74 if (Opcode == AVR::STPtrPiRr)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| LeonPasses.cpp | 49 unsigned Opcode = MI.getOpcode();
50 if (Opcode >= SP::LDDArr && Opcode <= SP::LDrr) {
84 unsigned Opcode = MI.getOpcode();
85 if (Opcode == SP::CALL && MI.getNumOperands() > 0) {
136 unsigned Opcode = MI.getOpcode();
142 if (Opcode == SP::FSQRTD || Opcode == SP::FDIVD) {
|
| /src/sys/external/bsd/acpica/dist/tools/acpihelp/ |
| ahaml.c | 3 * Module Name: ahaml - AML opcode decoding for acpihelp utility
60 * FUNCTION: AhFindAmlOpcode (entry point for AML opcode name search)
62 * PARAMETERS: Name - Name or prefix for an AML opcode.
82 /* Find/display all opcode names that match the input name prefix */
98 /* Upper case the opcode name before substring compare */
119 * FUNCTION: AhDecodeAmlOpcode (entry point for AML opcode search)
121 * PARAMETERS: OpcodeString - String version of AML opcode
125 * DESCRIPTION: Display information about the input AML opcode
134 UINT32 Opcode;
144 Opcode = strtoul (OpcodeString, NULL, 16)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kMCInstLower.cpp | 146 unsigned Opcode = MI->getOpcode();
147 OutMI.setOpcode(Opcode);
158 if (Opcode == M68k::TAILJMPj || Opcode == M68k::TAILJMPq) {
160 switch (Opcode) {
162 Opcode = M68k::JMP32j;
165 Opcode = M68k::BRA8;
168 OutMI.setOpcode(Opcode);
|
| M68kExpandPseudo.cpp | 77 unsigned Opcode = MI.getOpcode();
80 switch (Opcode) {
221 if (Opcode == M68k::TCRETURNq) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 116 // This isn't a memory opcode because we'd need to attach two
373 // Return true if OPCODE is some kind of PC-relative address.
374 inline bool isPCREL(unsigned Opcode) {
375 return Opcode == PCREL_WRAPPER || Opcode == PCREL_OFFSET;
444 bool shouldFormOverflowOp(unsigned Opcode, EVT VT,
451 const char *getTargetNodeName(unsigned Opcode) const override;
569 SDValue getVectorCmp(SelectionDAG &DAG, unsigned Opcode,
585 SelectionDAG &DAG, unsigned Opcode,
613 unsigned Opcode) const
[all...] |
| /src/sys/external/bsd/acpica/dist/parser/ |
| psparse.c | 49 * fairly compact by parsing based on a list of AML opcode
69 * PARAMETERS: Opcode - An AML opcode
71 * RETURN: Size of the opcode, in bytes (1 or 2)
73 * DESCRIPTION: Get the size of the current opcode.
79 UINT32 Opcode)
82 /* Extended (2-byte) opcode if > 255 */
84 if (Opcode > 0x00FF)
89 /* Otherwise, just a single byte opcode */
101 * RETURN: Next AML opcode
[all...] |
| /src/external/apache2/llvm/dist/clang/include/clang/Analysis/Analyses/ |
| ThreadSafetyLogical.h | 23 enum Opcode {
29 Opcode kind() const { return Kind; }
36 LExpr(Opcode Kind) : Kind(Kind) {}
39 Opcode Kind;
58 BinOp(LExpr *LHS, LExpr *RHS, Opcode Code) : LExpr(Code), LHS(LHS), RHS(RHS) {}
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMInstPrinter.cpp | 94 unsigned Opcode = MI->getOpcode();
96 switch (Opcode) {
154 if (Opcode == ARM::t2STMDB_UPD)
183 if (Opcode == ARM::t2LDMIA_UPD)
263 bool isStore = Opcode == ARM::STREXD || Opcode == ARM::STLEXD;
268 NewMI.setOpcode(Opcode);
871 unsigned Opcode = MI->getOpcode();
874 if (Opcode == ARM::t2MSR_M && FeatureBits[ARM::FeatureDSP]) {
884 if (Opcode == ARM::t2MSR_M && FeatureBits [ARM::HasV7Ops])
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRRelaxMemOperations.cpp | 53 MachineInstrBuilder buildMI(Block &MBB, BlockIt MBBI, unsigned Opcode) {
54 return BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(Opcode));
126 int Opcode = MBBI->getOpcode();
132 switch (Opcode) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCCodeEmitter.cpp | 125 unsigned Opcode = MI.getOpcode();
129 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
164 int MemOpStartIndex = 1, Opcode = MI.getOpcode();
165 if (Opcode == BPF::CMPXCHGW32 || Opcode == BPF::CMPXCHGD)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelDAGToDAG.cpp | 273 unsigned Opcode = Node->getOpcode();
284 switch (Opcode) {
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
| Clustering.cpp | 187 // Given an instruction Opcode, which are the benchmarks of this instruction?
193 const unsigned Opcode = Point.keyInstruction().getOpcode();
194 assert(Opcode < NumOpcodes && "NumOpcodes is incorrect (too small)");
195 SmallVectorImpl<size_t> &PointsOfOpcode = OpcodeToPoints[Opcode];
197 ++NumOpcodesSeen; // this opcode, then naturally this is the new opcode.
206 Clusters_.reserve(NumOpcodesSeen); // One cluster per opcode.
219 // And add all the points of this opcode to the new cluster.
228 // Given an instruction Opcode, we can make benchmarks (measurements) of the
233 // benchmarks of the same instruction Opcode, we may end up with *different
[all...] |
| /src/sys/external/bsd/acpica/dist/compiler/ |
| aslcodegen.c | 239 * PARAMETERS: Op - Parse node with an AML opcode
243 * DESCRIPTION: Write the AML opcode corresponding to a parse node.
254 UINT16 Opcode;
285 printf ("Found a node with an unassigned AML opcode\n");
287 "Found a node with an unassigned AML opcode\n");
294 Aml.Opcode = AML_FIELD_OFFSET_OP;
299 Aml.Opcode = AML_FIELD_ACCESS_OP;
304 Aml.Opcode = AML_FIELD_CONNECTION_OP;
309 Aml.Opcode = Op->Asl.AmlOpcode;
314 switch (Aml.Opcode)
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| CombinerHelper.h | 11 /// Targets can pick individual opcode transformations from the helper or use
73 unsigned Opcode = 0; /// The opcode for the produced instruction.
76 InstructionBuildSteps(unsigned Opcode, const OperandBuildSteps &OperandFns)
77 : Opcode(Opcode), OperandFns(OperandFns) {}
249 /// shift-by-constant operand with identical opcode, we may be able to convert
|
| LegalizerInfo.h | 103 /// Legalization is decided based on an instruction's opcode, which type slot
107 unsigned Opcode;
111 InstrAspect(unsigned Opcode, LLT Type) : Opcode(Opcode), Type(Type) {}
112 InstrAspect(unsigned Opcode, unsigned Idx, LLT Type)
113 : Opcode(Opcode), Idx(Idx), Type(Type) {}
116 return Opcode == RHS.Opcode && Idx == RHS.Idx && Type == RHS.Type
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/DWARF/ |
| DWARFExpression.h | 81 uint8_t Opcode; ///< The Op Opcode, DW_OP_<something>.
90 uint8_t getCode() { return Opcode; }
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| MachineFrameInfo.cpp | 192 "Can only compute MaxCallFrameSize if Setup/Destroy opcode are known");
197 unsigned Opcode = MI.getOpcode();
198 if (Opcode == FrameSetupOpcode || Opcode == FrameDestroyOpcode) {
|
| /src/external/apache2/llvm/dist/llvm/lib/DebugInfo/DWARF/ |
| DWARFExpression.cpp | 111 static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode) {
115 if (OpCode >= Descriptions.size())
117 return Descriptions[OpCode];
124 Opcode = Data.getU8(&Offset);
126 Desc = getOpDesc(Opcode);
228 DIDumpOptions DumpOpts, uint8_t Opcode,
237 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
238 Opcode == DW_OP_regval_type)
240 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| R600EmitClauseMarkers.cpp | 274 unsigned Opcode = PushBeforeModifier ?
276 BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead), TII->get(Opcode))
|
