HomeSort by: relevance | last modified time | path
    Searched defs:PAD_CTL_DSE_MASK (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/arch/arm/imx/
imx51reg.h 304 #define PAD_CTL_DSE_MASK __BITS(2, 1)
305 #define PAD_CTL_DSE_LOW __SHIFTIN(0x0, PAD_CTL_DSE_MASK)
306 #define PAD_CTL_DSE_MID __SHIFTIN(0x1, PAD_CTL_DSE_MASK)
307 #define PAD_CTL_DSE_HIGH __SHIFTIN(0x2, PAD_CTL_DSE_MASK)
308 #define PAD_CTL_DSE_MAX __SHIFTIN(0x3, PAD_CTL_DSE_MASK)
  /src/sys/arch/arm/nxp/
imx6_iomuxreg.h 2259 #define PAD_CTL_DSE_MASK __BITS(5, 3)
2260 #define PAD_CTL_DSE_HIZ __SHIFTIN(0x0, PAD_CTL_DSE_MASK)
2261 #define PAD_CTL_DSE_290OHM __SHIFTIN(0x1, PAD_CTL_DSE_MASK)
2262 #define PAD_CTL_DSE_240OHM __SHIFTIN(0x1, PAD_CTL_DSE_MASK)
2263 #define PAD_CTL_DSE_121OHM __SHIFTIN(0x2, PAD_CTL_DSE_MASK)
2264 #define PAD_CTL_DSE_120OHM __SHIFTIN(0x2, PAD_CTL_DSE_MASK)
2265 #define PAD_CTL_DSE_80OHM __SHIFTIN(0x3, PAD_CTL_DSE_MASK)
2266 #define PAD_CTL_DSE_76OHM __SHIFTIN(0x3, PAD_CTL_DSE_MASK)
2267 #define PAD_CTL_DSE_60OHM __SHIFTIN(0x4, PAD_CTL_DSE_MASK)
2268 #define PAD_CTL_DSE_48OHM __SHIFTIN(0x5, PAD_CTL_DSE_MASK)
    [all...]

Completed in 16 milliseconds