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Searched defs:POWER10 (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
ppc-opc.c	2246 /* Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2260 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2314 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2328 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. */ 5092 #define POWER10 PPC_OPCODE_POWER10 5237 {"vrlq", VX (4, 5), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5242 {"vdivuq", VX (4, 11), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5245 {"vstribl", VXVA(4,13,0), VXVA_MASK, POWER10, 0, {VD, VB}}, 5246 {"vstribr", VXVA(4,13,1), VXVA_MASK, POWER10, 0, {VD, VB}}, 5247 {"vstrihl", VXVA(4,13,2), VXVA_MASK, POWER10, 0, {VD, VB}} [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
ppc-opc.c	2246 /* Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2260 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2314 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2328 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. */ 5076 #define POWER10 PPC_OPCODE_POWER10 5220 {"vrlq", VX (4, 5), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5225 {"vdivuq", VX (4, 11), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5228 {"vstribl", VXVA(4,13,0), VXVA_MASK, POWER10, 0, {VD, VB}}, 5229 {"vstribr", VXVA(4,13,1), VXVA_MASK, POWER10, 0, {VD, VB}}, 5230 {"vstrihl", VXVA(4,13,2), VXVA_MASK, POWER10, 0, {VD, VB}} [all...]
/src/external/gpl3/gdb/dist/opcodes/
ppc-opc.c	2200 /* Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2214 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2268 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2282 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. */ 4957 #define POWER10 PPC_OPCODE_POWER10 5101 {"vrlq", VX (4, 5), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5106 {"vdivuq", VX (4, 11), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5109 {"vstribl", VXVA(4,13,0), VXVA_MASK, POWER10, 0, {VD, VB}}, 5110 {"vstribr", VXVA(4,13,1), VXVA_MASK, POWER10, 0, {VD, VB}}, 5111 {"vstrihl", VXVA(4,13,2), VXVA_MASK, POWER10, 0, {VD, VB}} [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
ppc-opc.c	2200 /* Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2214 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2268 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. / 2282 / Power10 doesn't allow VSRs to overlap ACCs in MMA instructions. */ 4957 #define POWER10 PPC_OPCODE_POWER10 5101 {"vrlq", VX (4, 5), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5106 {"vdivuq", VX (4, 11), VX_MASK, POWER10, 0, {VD, VA, VB}}, 5109 {"vstribl", VXVA(4,13,0), VXVA_MASK, POWER10, 0, {VD, VB}}, 5110 {"vstribr", VXVA(4,13,1), VXVA_MASK, POWER10, 0, {VD, VB}}, 5111 {"vstrihl", VXVA(4,13,2), VXVA_MASK, POWER10, 0, {VD, VB}} [all...]

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