| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 3293 /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */
5091 #define POWER9 PPC_OPCODE_POWER9
5304 {"maddhd", VXA(4, 48), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5306 {"maddhdu", VXA(4, 49), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5309 {"maddld", VXA(4, 51), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
6497 {"scv", SC(17,0,1), SC_MASK, POWER9, PPCVLE, {SVC_LEV}},
6510 {"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE|EXT, {RT}},
6511 {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}},
6512 {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE|EXT, {RT, NDXD}},
6748 {"rfscv", XL(19,82), 0xffffffff, POWER9, PPCVLE, {0}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 3293 /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */
5075 #define POWER9 PPC_OPCODE_POWER9
5287 {"maddhd", VXA(4, 48), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5289 {"maddhdu", VXA(4, 49), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5292 {"maddld", VXA(4, 51), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
6469 {"scv", SC(17,0,1), SC_MASK, POWER9, PPCVLE, {SVC_LEV}},
6482 {"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE|EXT, {RT}},
6483 {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}},
6484 {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE|EXT, {RT, NDXD}},
6720 {"rfscv", XL(19,82), 0xffffffff, POWER9, PPCVLE, {0}}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 3215 /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */
4956 #define POWER9 PPC_OPCODE_POWER9
5168 {"maddhd", VXA(4, 48), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5170 {"maddhdu", VXA(4, 49), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5173 {"maddld", VXA(4, 51), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
6350 {"scv", SC(17,0,1), SC_MASK, POWER9, PPCVLE, {SVC_LEV}},
6363 {"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE|EXT, {RT}},
6364 {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}},
6365 {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE|EXT, {RT, NDXD}},
6601 {"rfscv", XL(19,82), 0xffffffff, POWER9, PPCVLE, {0}}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 3215 /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */
4956 #define POWER9 PPC_OPCODE_POWER9
5168 {"maddhd", VXA(4, 48), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5170 {"maddhdu", VXA(4, 49), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
5173 {"maddld", VXA(4, 51), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}},
6350 {"scv", SC(17,0,1), SC_MASK, POWER9, PPCVLE, {SVC_LEV}},
6363 {"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE|EXT, {RT}},
6364 {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}},
6365 {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE|EXT, {RT, NDXD}},
6601 {"rfscv", XL(19,82), 0xffffffff, POWER9, PPCVLE, {0}}
[all...] |
