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    Searched defs:PR (Results 1 - 25 of 57) sorted by relevancy

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  /src/bin/pax/
dumptar.c 76 #define PR(a) \
82 PR(name);
90 PR(linkname);
91 PR(magic);
92 PR(version);
93 PR(uname);
94 PR(gname);
97 PR(prefix);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRTargetMachine.cpp 83 auto &PR = *PassRegistry::getPassRegistry();
84 initializeAVRExpandPseudoPass(PR);
85 initializeAVRRelaxMemPass(PR);
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
BPFTargetMachine.cpp 43 PassRegistry &PR = *PassRegistry::getPassRegistry();
44 initializeBPFAbstractMemberAccessLegacyPassPass(PR);
45 initializeBPFPreserveDITypePass(PR);
46 initializeBPFAdjustOptPass(PR);
47 initializeBPFCheckAndAdjustIRPass(PR);
48 initializeBPFMIPeepholePass(PR);
49 initializeBPFMIPeepholeTruncElimPass(PR);
  /src/external/apache2/llvm/dist/llvm/lib/MCA/
InstrBuilder.cpp 67 const MCProcResourceDesc &PR = *SM.getProcResource(PRE->ProcResourceIdx);
72 << PR.Name << "\n";
80 if (PR.BufferSize < 0) {
84 AnyDispatchHazards |= (PR.BufferSize == 0);
85 AllInOrderResources &= (PR.BufferSize <= 1);
90 if (PR.SuperIdx) {
91 uint64_t Super = ProcResourceMasks[PR.SuperIdx];
174 const MCProcResourceDesc &PR = *SM.getProcResource(I);
175 if (PR.BufferSize == -1)
  /src/external/gpl3/gdb/dist/sim/bfin/
dv-bfin_emac.h 27 #define PR (1 << 7)
  /src/external/gpl3/gdb.old/dist/sim/bfin/
dv-bfin_emac.h 27 #define PR (1 << 7)
  /src/usr.bin/hexdump/
hexdump.h 52 } PR;
84 void bpad(PR *);
85 void conv_c(PR *, u_char *);
86 void conv_u(PR *, u_char *);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonPeephole.cpp 260 unsigned PR = 1, S1 = 2, S2 = 3; // Operand indices.
275 Register PSrc = MI.getOperand(PR).getReg();
HexagonTargetMachine.cpp 197 PassRegistry &PR = *PassRegistry::getPassRegistry();
198 initializeHexagonBitSimplifyPass(PR);
199 initializeHexagonConstExtendersPass(PR);
200 initializeHexagonConstPropagationPass(PR);
201 initializeHexagonEarlyIfConversionPass(PR);
202 initializeHexagonGenMuxPass(PR);
203 initializeHexagonHardwareLoopsPass(PR);
204 initializeHexagonLoopIdiomRecognizeLegacyPassPass(PR);
205 initializeHexagonNewValueJumpPass(PR);
206 initializeHexagonOptAddrModePass(PR);
    [all...]
HexagonGenPredicate.cpp 68 friend raw_ostream &operator<< (raw_ostream &OS, const PrintRegister &PR);
77 raw_ostream &operator<< (raw_ostream &OS, const PrintRegister &PR)
79 raw_ostream &operator<< (raw_ostream &OS, const PrintRegister &PR) {
80 return OS << printReg(PR.Reg.R, &PR.TRI, PR.Reg.S);
261 RegisterSubReg PR = DefI->getOperand(1);
262 G2P.insert(std::make_pair(Reg, PR));
263 LLVM_DEBUG(dbgs() << " -> " << PrintRegister(PR, *TRI) << '\n');
264 return PR;
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsTargetMachine.cpp 55 PassRegistry *PR = PassRegistry::getPassRegistry();
56 initializeGlobalISel(*PR);
57 initializeMipsDelaySlotFillerPass(*PR);
58 initializeMipsBranchExpansionPass(*PR);
59 initializeMicroMipsSizeReducePass(*PR);
60 initializeMipsPreLegalizerCombinerPass(*PR);
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXTargetMachine.cpp 85 PassRegistry &PR = *PassRegistry::getPassRegistry();
86 initializeNVVMReflectPass(PR);
87 initializeNVVMIntrRangePass(PR);
88 initializeGenericToNVVMPass(PR);
89 initializeNVPTXAllocaHoistingPass(PR);
90 initializeNVPTXAssignValidGlobalNamesPass(PR);
91 initializeNVPTXAtomicLowerPass(PR);
92 initializeNVPTXLowerArgsPass(PR);
93 initializeNVPTXLowerAllocaPass(PR);
94 initializeNVPTXLowerAggrCopiesPass(PR);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVTargetMachine.cpp 38 auto *PR = PassRegistry::getPassRegistry();
39 initializeGlobalISel(*PR);
40 initializeRISCVMergeBaseOffsetOptPass(*PR);
41 initializeRISCVExpandPseudoPass(*PR);
42 initializeRISCVCleanupVSETVLIPass(*PR);
  /src/external/gpl3/binutils/dist/opcodes/
rl78-dis.c 127 #define PR (dis->fprintf_func)
129 #define PC(c) PR (PS, "%c", c)
223 PR (PS, " \033[33mW\033[0m");
230 PR (PS, " \033[35m");
233 { PR (PS, "Z"); comma = ","; }
235 { PR (PS, "%sAC", comma); comma = ","; }
237 { PR (PS, "%sCY", comma); comma = ","; }
238 PR (PS, "\033[0m");
250 PR (PS, "es:");
269 PR (PS, "%s", condition_names[oper->condition])
    [all...]
rx-dis.c 238 #define PR (dis->fprintf_func)
240 #define PC(c) PR (PS, "%c", c)
251 PR (PS, ".byte ");
255 PR (PS, "0x%02x ", buf[i]);
297 PR (PS, "%s", get_opsize_name (opcode.size));
313 PR (PS, "#%d, #%d, #%d, %s, %s",
326 PR (PS, "%s", get_size_name (oper->size));
337 PR (PS, "%#x", oper->addend);
339 PR (PS, "%d", oper->addend);
343 PR (PS, "%s", get_register_name (oper->reg))
    [all...]
  /src/external/gpl3/binutils.old/dist/opcodes/
rl78-dis.c 127 #define PR (dis->fprintf_func)
129 #define PC(c) PR (PS, "%c", c)
223 PR (PS, " \033[33mW\033[0m");
230 PR (PS, " \033[35m");
233 { PR (PS, "Z"); comma = ","; }
235 { PR (PS, "%sAC", comma); comma = ","; }
237 { PR (PS, "%sCY", comma); comma = ","; }
238 PR (PS, "\033[0m");
250 PR (PS, "es:");
269 PR (PS, "%s", condition_names[oper->condition])
    [all...]
  /src/external/gpl3/gdb/dist/opcodes/
rl78-dis.c 127 #define PR (dis->fprintf_func)
129 #define PC(c) PR (PS, "%c", c)
223 PR (PS, " \033[33mW\033[0m");
230 PR (PS, " \033[35m");
233 { PR (PS, "Z"); comma = ","; }
235 { PR (PS, "%sAC", comma); comma = ","; }
237 { PR (PS, "%sCY", comma); comma = ","; }
238 PR (PS, "\033[0m");
250 PR (PS, "es:");
269 PR (PS, "%s", condition_names[oper->condition])
    [all...]
  /src/external/gpl3/gdb.old/dist/opcodes/
rl78-dis.c 127 #define PR (dis->fprintf_func)
129 #define PC(c) PR (PS, "%c", c)
223 PR (PS, " \033[33mW\033[0m");
230 PR (PS, " \033[35m");
233 { PR (PS, "Z"); comma = ","; }
235 { PR (PS, "%sAC", comma); comma = ","; }
237 { PR (PS, "%sCY", comma); comma = ","; }
238 PR (PS, "\033[0m");
250 PR (PS, "es:");
269 PR (PS, "%s", condition_names[oper->condition])
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64TargetMachine.cpp 173 auto PR = PassRegistry::getPassRegistry();
174 initializeGlobalISel(*PR);
175 initializeAArch64A53Fix835769Pass(*PR);
176 initializeAArch64A57FPLoadBalancingPass(*PR);
177 initializeAArch64AdvSIMDScalarPass(*PR);
178 initializeAArch64BranchTargetsPass(*PR);
179 initializeAArch64CollectLOHPass(*PR);
180 initializeAArch64CompressJumpTablesPass(*PR);
181 initializeAArch64ConditionalComparesPass(*PR);
182 initializeAArch64ConditionOptimizerPass(*PR);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTargetMachine.cpp 107 PassRegistry &PR = *PassRegistry::getPassRegistry();
109 initializePPCCTRLoopsVerifyPass(PR);
111 initializePPCLoopInstrFormPrepPass(PR);
112 initializePPCTOCRegDepsPass(PR);
113 initializePPCEarlyReturnPass(PR);
114 initializePPCVSXCopyPass(PR);
115 initializePPCVSXFMAMutatePass(PR);
116 initializePPCVSXSwapRemovalPass(PR);
117 initializePPCReduceCRLogicalsPass(PR);
118 initializePPCBSelPass(PR);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyTargetMachine.cpp 66 auto &PR = *PassRegistry::getPassRegistry();
67 initializeWebAssemblyAddMissingPrototypesPass(PR);
68 initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
69 initializeLowerGlobalDtorsPass(PR);
70 initializeFixFunctionBitcastsPass(PR);
71 initializeOptimizeReturnedPass(PR);
72 initializeWebAssemblyArgumentMovePass(PR);
73 initializeWebAssemblySetP2AlignOperandsPass(PR);
74 initializeWebAssemblyReplacePhysRegsPass(PR);
75 initializeWebAssemblyPrepareForLiveIntervalsPass(PR);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86TargetMachine.cpp 64 PassRegistry &PR = *PassRegistry::getPassRegistry();
65 initializeX86LowerAMXIntrinsicsLegacyPassPass(PR);
66 initializeX86LowerAMXTypeLegacyPassPass(PR);
67 initializeX86PreAMXConfigPassPass(PR);
68 initializeGlobalISel(PR);
69 initializeWinEHStatePassPass(PR);
70 initializeFixupBWInstPassPass(PR);
71 initializeEvexToVexInstPassPass(PR);
72 initializeFixupLEAPassPass(PR);
73 initializeFPSPass(PR);
    [all...]
  /src/external/apache2/llvm/dist/llvm/tools/llc/
llc.cpp 402 const PassRegistry *PR = PassRegistry::getPassRegistry();
403 const PassInfo *PI = PR->getPassInfo(PassName);
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
Assembler.cpp 55 const PassRegistry *PR = PassRegistry::getPassRegistry();
56 const PassInfo *PI = PR->getPassInfo(PassName);
  /src/external/bsd/ntp/dist/include/
icom.h 46 #define PR 0xfe /* preamble */

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