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Searched defs:PREFIXLDC (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/include/opcode/
h8300.h	1041 #define PREFIXLDC 0x0, 0x1, 0x4, B30 \| CCR_EXR \| DST 1426 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSIND, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1427 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSIND, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1428 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSPOSTINC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1429 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSPOSTINC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1430 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1431 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP16SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1432 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP32SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1433 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP32SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1434 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x0, IGNORE, SRC \| ABS16LIST, E}}} [all...]
/src/external/gpl3/binutils.old/dist/include/opcode/
h8300.h	1041 #define PREFIXLDC 0x0, 0x1, 0x4, B30 \| CCR_EXR \| DST 1426 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSIND, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1427 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSIND, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1428 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSPOSTINC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1429 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSPOSTINC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1430 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1431 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP16SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1432 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP32SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1433 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP32SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1434 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x0, IGNORE, SRC \| ABS16LIST, E}}} [all...]
/src/external/gpl3/gdb/dist/include/opcode/
h8300.h	1041 #define PREFIXLDC 0x0, 0x1, 0x4, B30 \| CCR_EXR \| DST 1426 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSIND, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1427 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSIND, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1428 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSPOSTINC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1429 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSPOSTINC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1430 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1431 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP16SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1432 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP32SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1433 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP32SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1434 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x0, IGNORE, SRC \| ABS16LIST, E}}} [all...]
/src/external/gpl3/gdb.old/dist/include/opcode/
h8300.h	1041 #define PREFIXLDC 0x0, 0x1, 0x4, B30 \| CCR_EXR \| DST 1426 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSIND, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1427 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSIND, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0x9, B30 \| RSIND, IGNORE, E}}}, 1428 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{RSPOSTINC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1429 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{RSPOSTINC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xD, B30 \| RSPOSTINC, IGNORE, E}}}, 1430 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1431 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP16SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x6, 0xF, B30 \| DISPREG, IGNORE, SRC \| DISP16LIST, E}}}, 1432 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{DISP32SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1433 {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP32SRC, EXR \| DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 \| DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC \| DISP32LIST, E}}}, 1434 {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS16SRC, CCR \| DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x0, IGNORE, SRC \| ABS16LIST, E}}} [all...]

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