| /src/sys/external/bsd/gnu-efi/dist/inc/arm/ |
| efisetjmp_arch.h | 18 UINT32 R12;
|
| /src/sys/external/bsd/gnu-efi/dist/inc/x86_64/ |
| efisetjmp_arch.h | 15 UINT64 R12;
|
| /src/external/bsd/pcc/dist/pcc/arch/pdp10/ |
| macdefs.h | 171 #define R12 012
230 { R11, R12, XR10, XR12, -1 }, \
231 { R12, R13, XR11, XR13, -1 }, \
|
| /src/external/bsd/pcc/dist/pcc/arch/pdp11/ |
| macdefs.h | 156 #define R12 011
179 { R01, R12, -1 }, \
180 { R12, R23, -1 }, \
188 { R0, R1, R12, -1 }, \
190 { R2, R3, R12, R34, -1 }, \
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 459 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
464 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
782 unsigned R12 = MSP430::R12;
784 Chain = DAG.getCopyToReg(Chain, dl, R12, Val, Flag);
786 RetOps.push_back(DAG.getRegister(R12, getPointerTy(DAG.getDataLayout())));
|
| /src/external/bsd/pcc/dist/pcc/arch/amd64/ |
| macdefs.h | 170 #define R12 014
|
| /src/external/bsd/pcc/dist/pcc/arch/arm/ |
| macdefs.h | 128 #define R12 12
135 #define IP R12
|
| /src/external/gpl3/gdb/dist/gdb/stubs/ |
| m32r-stub.c | 122 R8, R9, R10, R11, R12, R13, R14, R15,
1287 st r12, @+r1\n\
1354 ld r12, @r0+ ; restore r12\n\
|
| sh-stub.c | 264 R8, R9, R10, R11, R12, R13, R14,
1182 mov.l r12, @(0x30, r0) ! save R12
1239 mov.l @r1+, r12 ! restore R12
|
| /src/external/gpl3/gdb/dist/sim/aarch64/ |
| cpustate.h | 54 R12,
|
| /src/external/gpl3/gdb.old/dist/gdb/stubs/ |
| m32r-stub.c | 122 R8, R9, R10, R11, R12, R13, R14, R15,
1287 st r12, @+r1\n\
1354 ld r12, @r0+ ; restore r12\n\
|
| sh-stub.c | 264 R8, R9, R10, R11, R12, R13, R14,
1182 mov.l r12, @(0x30, r0) ! save R12
1239 mov.l @r1+, r12 ! restore R12
|
| /src/external/gpl3/gdb.old/dist/sim/aarch64/ |
| cpustate.h | 54 R12,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 423 - If MBB is an entry or exit block, set SR1 and SR2 to R0 and R12
427 - If the defaults (R0/R12) are available, return true
446 Register R12 = Subtarget.isPPC64() ? PPC::X12 : PPC::R12;
454 *SR2 = R12;
457 // If MBB is an entry or exit block, use R0 and R12 as the scratch registers.
478 // Note that we only return here if both R0 and R12 are available because
481 if (!RS.isRegUsed(R0) && !RS.isRegUsed(R12))
654 Register TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg
655 // ...(R12/X12 is volatile in both Darwin & SVR4, & can't be a function arg.
[all...] |
| /src/external/bsd/pcc/dist/pcc/arch/hppa/ |
| macdefs.h | 129 #define R12 12
169 #define RD18 50 /* r12:r11 */
170 #define RD19 51 /* r13:r12 */
365 { R12, R11, -1 }, \
366 { R13, R12, -1 }, \
|
| /src/external/bsd/pcc/dist/pcc/arch/powerpc/ |
| macdefs.h | 159 #define R12 12 /* scratch register */
246 SAREG|TEMPREG, /* R12 */ \
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineAndOrXor.cpp | 310 Value *R11, *R12;
312 if (decomposeBitTestICmp(R1, R2, PredR, R11, R12, R2)) {
315 D = R12;
316 } else if (R12 == L11 || R12 == L12 || R12 == L21 || R12 == L22) {
317 A = R12;
326 if (!match(R1, m_And(m_Value(R11), m_Value(R12)))) {
330 R12 = Constant::getAllOnesValue(R1->getType())
[all...] |
| /src/sys/external/bsd/gnu-efi/dist/inc/ |
| efidebug.h | 287 UINT64 R12;
340 UINT64 R12;
501 UINT32 R12;
|
