| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| issue144.s | 13 R7 = A0.w;
14 DBGA ( R7.H , 0 ); DBGA ( R7.L , 0 );
26 R7 = A0.w;
27 DBGA ( R7.H , 0 ); DBGA ( R7.L , 0 );
28 R7 = A0.x;
29 DBGA ( R7.L , 0x0 );
|
| s15.s | 13 R7 = EXTRACT( R0, R1.L ) (Z);
14 DBGA ( R7.L , 0x34de );
15 DBGA ( R7.H , 0 );
20 R7 = EXTRACT( R0, R1.L ) (Z);
21 DBGA ( R7.L , 0x34de );
22 DBGA ( R7.H , 0x0002 );
27 R7 = EXTRACT( R0, R1.L ) (Z);
28 DBGA ( R7.L , 0 );
29 DBGA ( R7.H , 0 );
34 R7 = EXTRACT( R0, R1.L ) (Z)
[all...] |
| s16.s | 14 R7 = DEPOSIT( R0, R1 );
15 DBGA ( R7.L , 0xfead );
16 DBGA ( R7.H , 0x123f );
22 R7 = DEPOSIT( R0, R1 );
23 DBGA ( R7.L , 0xfead );
24 DBGA ( R7.H , 0x1234 );
30 R7 = DEPOSIT( R0, R1 );
31 DBGA ( R7.L , 0xfead );
32 DBGA ( R7.H , 0x1235 );
38 R7 = DEPOSIT( R0, R1 )
[all...] |
| s8.s | 17 R7 = A0.w;
18 DBGA ( R7.L , 0x0001 );
19 DBGA ( R7.H , 0x0000 );
20 R7.L = A0.x;
21 DBGA ( R7.L , 0x0000 );
33 R7 = A0.w;
34 DBGA ( R7.L , 0x0000 );
35 DBGA ( R7.H , 0x0001 );
36 R7.L = A0.x;
37 DBGA ( R7.L , 0x0001 )
[all...] |
| a11.S | 9 R7 = 0;
10 ASTAT = R7;
17 R7.L = R0 (RND);
19 CHECKREG R7, 0x7fff;
27 R7.H = R0 (RND);
29 CHECKREG R7, 0x7fff7fff;
37 R7.L = R0 (RND);
39 CHECKREG R7, 0x7fff7ff1
50 R7.H = R0 (RND);
52 CHECKREG R7, 0x7ff17ff
[all...] |
| a5.s | 20 R7 = 0;
21 ASTAT = R7;
25 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
26 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
27 CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
28 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 )
[all...] |
| a6.s | 3 // r7 = +/+ (r0,r1);
4 // r7 = +/+ (r0,r1) s;
5 // r7 = +/+ (r0,r1) sx;
17 R7 = 0;
18 ASTAT = R7;
19 R7 = R0 +|+ R1;
20 DBGA ( R7.L , 0x8000 );
21 DBGA ( R7.H , 0x0020 );
22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 )
[all...] |
| a9.s | 15 R7 = MAX ( R0 , R1 );
16 DBGA ( R7.L , 0x0001 );
17 DBGA ( R7.H , 0x0000 );
18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
21 CC = V; R7 = CC; DBGA ( R7.L , 0x0 )
[all...] |
| dsp_a4.s | 17 R7 = 0;
18 ASTAT = R7;
22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
24 CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
25 CC = VS; R7 = CC; DBGA ( R7.L , 0x1 )
[all...] |
| dsp_a7.s | 3 * r7 = +/- (r0,r1);
4 * r7 = -/+ (r0,r1);
5 * r7 = -/- (r0,r1);
18 R7 = 0;
19 ASTAT = R7;
20 R7 = R0 +|- R1;
21 DBGA ( R7.L , 0x0000 );
22 DBGA ( R7.H , 0x0020 );
23 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 )
[all...] |
| dsp_a8.s | 3 * (r7,r6) = +/- (r0,r1);
4 * (r7,r6) = +/- (r0,r1)s;
17 R7 = 0;
18 ASTAT = R7;
19 R6 = R0 + R1, R7 = R0 - R1 (NS);
22 DBGA ( R7.L , 0xfffe );
23 DBGA ( R7.H , 0x7fff );
24 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
25 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 )
[all...] |
| issue124.s | 23 R7 = A0.w; DBGA ( R7.H , 0 ); DBGA ( R7.L , 0 );
24 R7 = A0.x; DBGA ( R7.L , 0xff80 );
|
| issue140.S | 19 R7 = ASTAT;
20 CHECKREG R7, (_VS|_V|_V_COPY);
|
| issue83.s | 12 R7 = ASTAT;
13 _DBG R7;
15 //DBGA ( R7.H , 0x0000 );
16 //DBGA ( R7.L , 0x0000 );
41 R7 = ASTAT;
42 _DBG R7;
43 //DBGA ( R7.H , 0x0000 );
44 //DBGA ( R7.L , 0x0002 );
70 R7 = ASTAT;
71 _DBG R7;
[all...] |
| quadaddsub.s | 12 r7=0;
13 astat = r7;
17 r7=ASTAT;
18 _DBG R7;
19 DBGA (R7.H, 0x0);
20 DBGA (R7.L, 0x3005);
22 r7=0;
23 astat=r7;
27 r7=ASTAT;
28 _DBG R7;
[all...] |
| random_0027.S | 23 imm32 R7, 0xf9a22cee;
24 R4.H = (A1 -= R7.L * R7.H) (M, IS);
35 imm32 R7, 0x278abda8;
36 R7 = (A1 -= R4.L * R1.L) (M, IS);
37 checkreg R7, 0x7fffffff;
46 imm32 R7, 0x7fffc2b1;
47 A1 -= R3.L * R7.L (M, IS);
56 imm32 R7, 0x8000ffff;
57 A1 += R5.L * R7.L (M, IS)
[all...] |
| random_0028.S | 48 imm32 R7, 0x00ba086c;
49 R1.H = (A1 -= R7.L * R4.H) (M, S2RND);
83 imm32 R7, 0x6630d991;
84 R1 = (A1 -= R3.L * R7.H) (M, S2RND);
94 imm32 R7, 0x01070000;
95 R7 = (A1 += R1.L * R7.H) (M, S2RND);
96 checkreg R7, 0x80000000;
118 imm32 R7, 0x80000000;
119 R7 = (A1 -= R4.L * R2.L) (M, S2RND)
[all...] |
| random_0029.S | 47 imm32 R7, 0xfbf00410;
48 R5.H = (A1 -= R1.L * R7.H) (M, ISS2);
70 imm32 R7, 0x7fffa2af;
71 R2.H = (A1 += R7.L * R3.L) (M, ISS2);
93 imm32 R7, 0x00000000;
94 R3 = (A1 += R7.L * R6.L) (M, ISS2);
105 imm32 R7, 0x3488c040;
106 R7.H = (A1 -= R4.L * R5.H) (M, ISS2);
107 checkreg R7, 0x7fffc040;
117 imm32 R7, 0xffffb83a
[all...] |
| s13.s | 15 R7.L = ASHIFT R0.L BY R5.L;
16 DBGA ( R7.L , 0x0010 );
17 DBGA ( R7.H , 0x0000 );
18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
21 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 )
[all...] |
| s17.s | 9 R7 = 0;
10 ASTAT = R7;
13 R7.L = ONES R0;
14 DBGA ( R7.L , 0x0001 );
15 DBGA ( R7.H , 0x0000 );
16 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
17 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
18 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 )
[all...] |
| s18.s | 14 R7 = 0;
15 ASTAT = R7;
21 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
22 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
23 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
24 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 )
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| issue144.s | 13 R7 = A0.w;
14 DBGA ( R7.H , 0 ); DBGA ( R7.L , 0 );
26 R7 = A0.w;
27 DBGA ( R7.H , 0 ); DBGA ( R7.L , 0 );
28 R7 = A0.x;
29 DBGA ( R7.L , 0x0 );
|
| s15.s | 13 R7 = EXTRACT( R0, R1.L ) (Z);
14 DBGA ( R7.L , 0x34de );
15 DBGA ( R7.H , 0 );
20 R7 = EXTRACT( R0, R1.L ) (Z);
21 DBGA ( R7.L , 0x34de );
22 DBGA ( R7.H , 0x0002 );
27 R7 = EXTRACT( R0, R1.L ) (Z);
28 DBGA ( R7.L , 0 );
29 DBGA ( R7.H , 0 );
34 R7 = EXTRACT( R0, R1.L ) (Z)
[all...] |
| s16.s | 14 R7 = DEPOSIT( R0, R1 );
15 DBGA ( R7.L , 0xfead );
16 DBGA ( R7.H , 0x123f );
22 R7 = DEPOSIT( R0, R1 );
23 DBGA ( R7.L , 0xfead );
24 DBGA ( R7.H , 0x1234 );
30 R7 = DEPOSIT( R0, R1 );
31 DBGA ( R7.L , 0xfead );
32 DBGA ( R7.H , 0x1235 );
38 R7 = DEPOSIT( R0, R1 )
[all...] |
| s8.s | 17 R7 = A0.w;
18 DBGA ( R7.L , 0x0001 );
19 DBGA ( R7.H , 0x0000 );
20 R7.L = A0.x;
21 DBGA ( R7.L , 0x0000 );
33 R7 = A0.w;
34 DBGA ( R7.L , 0x0000 );
35 DBGA ( R7.H , 0x0001 );
36 R7.L = A0.x;
37 DBGA ( R7.L , 0x0001 )
[all...] |
