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Searched defs:RD_a (Results 1 - 8 of 8) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
micromips-opc.c	269 #define RD_a RD_HILO /* Read DSP accumulators (reuse RD_HILO). / 270 #define MOD_a WR_a\|RD_a 882 {"mftacx", "s", 0x0040041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 883 {"mftacx", "s,", 0x0040041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 894 {"mfthi", "s", 0x0020041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 895 {"mfthi", "s,", 0x0020041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 896 {"mftlo", "s", 0x0000041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 897 {"mftlo", "s,", 0x0000041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1278 {"extpdp", "t,7,6", 0x0000367c, 0xfc003fff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D32, 0 }, 1279 {"extpdpv", "t,7,s", 0x000038bc, 0xfc003fff, WR_1\|RD_3\|RD_a\|DSP_VOLA, 0, 0, D32, 0 } [all...]
mips-opc.c	366 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a 384 #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) / 385 #define MOD_a WR_a\|RD_a 1435 {"mftacx", "d", 0x41020021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1436 {"mftacx", "d,", 0x41020021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1447 {"mfthi", "d", 0x41010021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1448 {"mfthi", "d,", 0x41010021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1449 {"mftlo", "d", 0x41000021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1450 {"mftlo", "d,", 0x41000021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 2170 {"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D64, 0 } [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
micromips-opc.c	269 #define RD_a RD_HILO /* Read DSP accumulators (reuse RD_HILO). / 270 #define MOD_a WR_a\|RD_a 882 {"mftacx", "s", 0x0040041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 883 {"mftacx", "s,", 0x0040041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 894 {"mfthi", "s", 0x0020041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 895 {"mfthi", "s,", 0x0020041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 896 {"mftlo", "s", 0x0000041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 897 {"mftlo", "s,", 0x0000041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1278 {"extpdp", "t,7,6", 0x0000367c, 0xfc003fff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D32, 0 }, 1279 {"extpdpv", "t,7,s", 0x000038bc, 0xfc003fff, WR_1\|RD_3\|RD_a\|DSP_VOLA, 0, 0, D32, 0 } [all...]
mips-opc.c	366 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a 384 #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) / 385 #define MOD_a WR_a\|RD_a 1435 {"mftacx", "d", 0x41020021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1436 {"mftacx", "d,", 0x41020021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1447 {"mfthi", "d", 0x41010021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1448 {"mfthi", "d,", 0x41010021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1449 {"mftlo", "d", 0x41000021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1450 {"mftlo", "d,", 0x41000021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 2170 {"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D64, 0 } [all...]
/src/external/gpl3/gdb/dist/opcodes/
micromips-opc.c	269 #define RD_a RD_HILO /* Read DSP accumulators (reuse RD_HILO). / 270 #define MOD_a WR_a\|RD_a 882 {"mftacx", "s", 0x0040041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 883 {"mftacx", "s,", 0x0040041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 894 {"mfthi", "s", 0x0020041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 895 {"mfthi", "s,", 0x0020041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 896 {"mftlo", "s", 0x0000041e, 0xffe0ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 897 {"mftlo", "s,", 0x0000041e, 0xfe60ffff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1278 {"extpdp", "t,7,6", 0x0000367c, 0xfc003fff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D32, 0 }, 1279 {"extpdpv", "t,7,s", 0x000038bc, 0xfc003fff, WR_1\|RD_3\|RD_a\|DSP_VOLA, 0, 0, D32, 0 } [all...]
mips-opc.c	366 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a 384 #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) / 385 #define MOD_a WR_a\|RD_a 1435 {"mftacx", "d", 0x41020021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1436 {"mftacx", "d,", 0x41020021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1447 {"mfthi", "d", 0x41010021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1448 {"mfthi", "d,", 0x41010021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1449 {"mftlo", "d", 0x41000021, 0xffff07ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 1450 {"mftlo", "d,", 0x41000021, 0xfff307ff, WR_1\|RD_a\|TRAP, AL, 0, MT32, 0 }, 2170 {"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D64, 0 } [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
micromips-opc.c	261 #define RD_a RD_HILO /* Read DSP accumulators (reuse RD_HILO). */ 262 #define MOD_a WR_a\|RD_a 1216 {"extpdp", "t,7,6", 0x0000367c, 0xfc003fff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D32, 0 }, 1217 {"extpdpv", "t,7,s", 0x000038bc, 0xfc003fff, WR_1\|RD_3\|RD_a\|DSP_VOLA, 0, 0, D32, 0 }, 1218 {"extp", "t,7,6", 0x0000267c, 0xfc003fff, WR_1\|RD_a, 0, 0, D32, 0 }, 1219 {"extpv", "t,7,s", 0x000028bc, 0xfc003fff, WR_1\|RD_3\|RD_a, 0, 0, D32, 0 }, 1220 {"extr_rs.w", "t,7,6", 0x00002e7c, 0xfc003fff, WR_1\|RD_a, 0, 0, D32, 0 }, 1221 {"extr_r.w", "t,7,6", 0x00001e7c, 0xfc003fff, WR_1\|RD_a, 0, 0, D32, 0 }, 1222 {"extr_s.h", "t,7,6", 0x00003e7c, 0xfc003fff, WR_1\|RD_a, 0, 0, D32, 0 }, 1223 {"extrv_rs.w", "t,7,s", 0x00002ebc, 0xfc003fff, WR_1\|RD_3\|RD_a, 0, 0, D32, 0 } [all...]
mips-opc.c	365 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a 383 #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) / 384 #define MOD_a WR_a\|RD_a 1407 {"mftacx", "d", 0x41020021, 0xffff07ff, WR_1\|RD_a\|TRAP, 0, 0, MT32, 0 }, 1408 {"mftacx", "d,", 0x41020021, 0xfff307ff, WR_1\|RD_a\|TRAP, 0, 0, MT32, 0 }, 1419 {"mfthi", "d", 0x41010021, 0xffff07ff, WR_1\|RD_a\|TRAP, 0, 0, MT32, 0 }, 1420 {"mfthi", "d,", 0x41010021, 0xfff307ff, WR_1\|RD_a\|TRAP, 0, 0, MT32, 0 }, 1421 {"mftlo", "d", 0x41000021, 0xffff07ff, WR_1\|RD_a\|TRAP, 0, 0, MT32, 0 }, 1422 {"mftlo", "d,", 0x41000021, 0xfff307ff, WR_1\|RD_a\|TRAP, 0, 0, MT32, 0 }, 2165 {"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_1\|RD_a\|DSP_VOLA, 0, 0, D64, 0 } [all...]

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