| /src/sys/dev/iscsi/ |
| iscsi_text.c | 219 #define RX(state, key) (state->kflags [key] & NS_RECEIVED)
1467 if (!RX(state, K_Auth_CHAP_Algorithm) ||
1468 !RX(state, K_Auth_CHAP_Identifier) ||
1469 !RX(state, K_Auth_CHAP_Challenge)) {
|
| /src/external/gpl3/gdb.old/dist/sim/mcore/ |
| interp.c | 279 #define RX ((inst >> 8) & 0xF)
908 unsigned int rx, r1; local
910 rx = gr[RD];
921 for (rxnlz = 0; ((rx & 0x80000000) == 0) && (rxnlz < 32); rxnlz ++)
922 rx = rx << 1;
962 signed int rx, r1; local
965 rx = gr[RD];
969 if (((rx < 0) && (r1 > 0)) || ((rx >= 0) && (r1 < 0))
[all...] |
| /src/external/gpl3/gdb/dist/sim/mcore/ |
| interp.c | 279 #define RX ((inst >> 8) & 0xF)
908 unsigned int rx, r1; local
910 rx = gr[RD];
921 for (rxnlz = 0; ((rx & 0x80000000) == 0) && (rxnlz < 32); rxnlz ++)
922 rx = rx << 1;
962 signed int rx, r1; local
965 rx = gr[RD];
969 if (((rx < 0) && (r1 > 0)) || ((rx >= 0) && (r1 < 0))
[all...] |
| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 41 /* The ARX, ARY, RX and RY operands are alternate encodings of GPRs. */
3499 /* The RX field of the SE_RR form instruction. */
3500 #define RX RSO + 1
3504 #define ARX RX + 1
10131 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
10132 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
10133 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
10134 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
10135 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
10136 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 41 /* The ARX, ARY, RX and RY operands are alternate encodings of GPRs. */
3499 /* The RX field of the SE_RR form instruction. */
3500 #define RX RSO + 1
3504 #define ARX RX + 1
10066 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
10067 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
10068 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
10069 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
10070 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
10071 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 41 /* The ARX, ARY, RX and RY operands are alternate encodings of GPRs. */
3421 /* The RX field of the SE_RR form instruction. */
3422 #define RX RSO + 1
3426 #define ARX RX + 1
9923 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
9924 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
9925 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
9926 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
9927 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
9928 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 41 /* The ARX, ARY, RX and RY operands are alternate encodings of GPRs. */
3499 /* The RX field of the SE_RR form instruction. */
3500 #define RX RSO + 1
3504 #define ARX RX + 1
10088 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
10089 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
10090 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
10091 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
10092 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
10093 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
[all...] |
