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    Searched defs:SE_R (Results 1 - 6 of 6) sorted by relevancy

  /src/external/gpl3/binutils/dist/opcodes/
ppc-opc.c 4397 /* An SE_R form instruction. This is a 16-bit instruction. */
4398 #define SE_R(op, xop) \
4401 #define SE_R_MASK SE_R(0x3f, 0x3f)
10131 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
10132 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
10133 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
10134 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
10135 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
10136 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
10137 {"se_extzb", SE_R(0,12), SE_R_MASK, PPCVLE, 0, {RX}}
    [all...]
  /src/external/gpl3/binutils.old/dist/opcodes/
ppc-opc.c 4396 /* An SE_R form instruction. This is a 16-bit instruction. */
4397 #define SE_R(op, xop) \
4400 #define SE_R_MASK SE_R(0x3f, 0x3f)
10066 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
10067 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
10068 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
10069 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
10070 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
10071 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
10072 {"se_extzb", SE_R(0,12), SE_R_MASK, PPCVLE, 0, {RX}}
    [all...]
  /src/external/gpl3/gdb/dist/opcodes/
ppc-opc.c 4306 /* An SE_R form instruction. This is a 16-bit instruction. */
4307 #define SE_R(op, xop) \
4310 #define SE_R_MASK SE_R(0x3f, 0x3f)
9923 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
9924 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
9925 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
9926 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
9927 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
9928 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
9929 {"se_extzb", SE_R(0,12), SE_R_MASK, PPCVLE, 0, {RX}}
    [all...]
  /src/external/gpl3/gdb.old/dist/opcodes/
ppc-opc.c 4306 /* An SE_R form instruction. This is a 16-bit instruction. */
4307 #define SE_R(op, xop) \
4310 #define SE_R_MASK SE_R(0x3f, 0x3f)
9912 {"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},
9913 {"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},
9914 {"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},
9915 {"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},
9916 {"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},
9917 {"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},
9918 {"se_extzb", SE_R(0,12), SE_R_MASK, PPCVLE, 0, {RX}}
    [all...]
  /src/external/gpl3/binutils/dist/gas/config/
tc-arm.c 14739 SE_R,
14944 case SE_R:
  /src/external/gpl3/binutils.old/dist/gas/config/
tc-arm.c 14742 SE_R,
14947 case SE_R:

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