| /src/external/bsd/pcc/dist/pcc/arch/i86/ |
| table.c | 113 #define SHL SCREG /* shape for long*/
153 SHL, T32,
154 SHL, T32,
262 SHL, T32,
271 SHL, T32,
312 SHL, T32,
326 SHL|SOREG|SNAME, T32,
342 SHL, TLONGLONG,
600 SHL, T32,
601 SHL|SNAME|SOREG, T32
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiAluCode.h | 35 SHL = 0x17,
92 case SHL:
112 .Case("sh", SHL)
134 case ISD::SHL:
135 return AluCode::SHL;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZSelectionDAGInfo.cpp | 173 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, IPM,
175 SDValue SRA = DAG.getNode(ISD::SRA, DL, MVT::i32, SHL,
|
| /src/external/bsd/pcc/dist/pcc/cc/ccom/ |
| softfloat.c | 156 #define SHL(x,b) ((dword)(x) << b)
157 T = SHL(1,55) | SHL(DMANTH(t), 48) |
158 SHL(t.fd2, 32) | SHL(t.fd3, 16) | t.fd4;
159 N = SHL(1,55) | SHL(DMANTH(n), 48) |
160 SHL(n.fd2, 32) | SHL(n.fd3, 16) | n.fd4;
252 mant = SHL(1,55) | SHL(DMANTH(sf), 48)
[all...] |
| /src/external/bsd/pcc/dist/pcc/cc/cxxcom/ |
| softfloat.c | 156 #define SHL(x,b) ((dword)(x) << b)
157 T = SHL(1,55) | SHL(DMANTH(t), 48) |
158 SHL(t.fd2, 32) | SHL(t.fd3, 16) | t.fd4;
159 N = SHL(1,55) | SHL(DMANTH(n), 48) |
160 SHL(n.fd2, 32) | SHL(n.fd3, 16) | n.fd4;
252 mant = SHL(1,55) | SHL(DMANTH(sf), 48)
[all...] |
| /src/usr.bin/xlint/lint1/ |
| op.h | 83 SHL,
|
| /src/external/gpl3/binutils/dist/gas/config/ |
| rl78-parse.h | 156 SHL = 357, /* SHL */
281 #define SHL 357
|
| rl78-parse.c | 342 SHL = 357, /* SHL */
467 #define SHL 357
617 YYSYMBOL_SHL = 102, /* SHL */
1156 "SAR", "SARW", "SEL", "SET1", "SHL", "SHLW", "SHR", "SHRW", "SKC", "SKH",
3725 case 242: /* statement: SHL A ',' EXPR */
3733 case 243: /* statement: SHL B ',' EXPR */
3741 case 244: /* statement: SHL C ',' EXPR */
4570 OPC(SHL),
|
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| rl78-parse.h | 156 SHL = 357, /* SHL */
281 #define SHL 357
|
| rl78-parse.c | 342 SHL = 357, /* SHL */
467 #define SHL 357
617 YYSYMBOL_SHL = 102, /* SHL */
1156 "SAR", "SARW", "SEL", "SET1", "SHL", "SHLW", "SHR", "SHRW", "SKC", "SKH",
3725 case 242: /* statement: SHL A ',' EXPR */
3733 case 243: /* statement: SHL B ',' EXPR */
3741 case 244: /* statement: SHL C ',' EXPR */
4570 OPC(SHL),
|
| /src/sys/external/bsd/sljit/dist/sljit_src/ |
| sljitNativeX86_common.c | 233 #define SHL (/* SHIFT */ 4 << 3)
916 /* shl reg, 24 */
919 *inst |= SHL;
2161 return emit_shift_with_flags(compiler, SHL, HAS_FLAGS(op),
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 602 if (C1->getSExtValue() != 0 || Sub_1.getOpcode() != ISD::SHL)
891 case ISD::SHL: return SelectSHL(N);
1026 // Transform: (store ch val (add x (add (shl y c) e)))
1027 // to: (store ch val (add x (shl (add y d) c))),
1028 // where e = (shl d c) for some integer d.
1041 // Off needs to match: (add x (add (shl y c) (shl d c))))
1052 // T1 needs to match: (shl y c)
1053 if (T1.getOpcode() != ISD::SHL)
1062 // T2 needs to match e, where e = (shl d c) for some d
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 647 SHL,
732 /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 192 setOperationAction(ISD::SHL, VT, Custom);
265 setOperationAction(ISD::SHL, VT, Custom);
959 setTargetDAGCombine(ISD::SHL);
1140 setOperationAction(ISD::SHL, MVT::i64, Custom);
1526 setTargetDAGCombine(ISD::SHL);
1917 if (Op.getOpcode() != ISD::SHL)
3413 SDValue Slot = DAG.getNode(ISD::SHL, DL, PtrVT, TLSIndex,
3893 SDValue SHL =
3894 DAG.getNode(ISD::SHL, dl, VTy, XOR, DAG.getConstant(1, dl, VTy));
3896 DAG.getNode(ISD::OR, dl, VTy, SHL, DAG.getConstant(1, dl, VTy))
[all...] |
