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      1 /* -*-C++-*-	$NetBSD: sh.h,v 1.4 2008/04/28 20:23:20 martin Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _HPCBOOT_SH_CPU_SH_H_
     33 #define	_HPCBOOT_SH_CPU_SH_H_
     34 
     35 /*
     36  * SH3, SH4 common defines.
     37  */
     38 
     39 /*
     40  * Address space.
     41  */
     42 #define	SH_P0_START		0x00000000
     43 #define	SH_P1_START		0x80000000
     44 #define	SH_P2_START		0xa0000000
     45 #define	SH_P3_START		0xc0000000
     46 #define	SH_P4_START		0xe0000000
     47 
     48 /*
     49  * Chip select.
     50  */
     51 #define	SH_AREA_SIZE		0x04000000
     52 
     53 #define	SH_AREA0_START		0x00000000
     54 #define	SH_AREA1_START		0x04000000
     55 #define	SH_AREA2_START		0x08000000
     56 #define	SH_AREA3_START		0x0c000000
     57 #define	SH_AREA4_START		0x10000000
     58 #define	SH_AREA5_START		0x14000000
     59 #define	SH_AREA6_START		0x18000000
     60 #define	SH_AREA7_START		0x1c000000
     61 
     62 
     63 #endif /* _HPCBOOT_SH_CPU_SH_H_ */
     64