| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 3709 /* The SIMM field in a VX form instruction, and TE in Z form. */
3710 #define SIMM VD + 1
3711 #define TE SIMM
3715 #define UIMM SIMM + 1
5504 {"evsplati", VX (4, 553), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5506 {"evsplatfi", VX (4, 555), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5719 {"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5762 {"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5782 {"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
10420 {"zvsplatih", VX_LSP(4, 0x23F), VX_LSP_MASK, PPCLSP, 0, {RD, SIMM}},
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 3709 /* The SIMM field in a VX form instruction, and TE in Z form. */
3710 #define SIMM VD + 1
3711 #define TE SIMM
3715 #define UIMM SIMM + 1
5476 {"evsplati", VX (4, 553), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5478 {"evsplatfi", VX (4, 555), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5691 {"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5734 {"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5754 {"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
10355 {"zvsplatih", VX_LSP(4, 0x23F), VX_LSP_MASK, PPCLSP, 0, {RD, SIMM}},
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 3631 /* The SIMM field in a VX form instruction, and TE in Z form. */
3632 #define SIMM VD + 1
3633 #define TE SIMM
3637 #define UIMM SIMM + 1
5357 {"evsplati", VX (4, 553), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5359 {"evsplatfi", VX (4, 555), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5572 {"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5615 {"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5635 {"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
10212 {"zvsplatih", VX_LSP(4, 0x23F), VX_LSP_MASK, PPCLSP, 0, {RD, SIMM}},
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 3631 /* The SIMM field in a VX form instruction, and TE in Z form. */
3632 #define SIMM VD + 1
3633 #define TE SIMM
3637 #define UIMM SIMM + 1
5357 {"evsplati", VX (4, 553), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5359 {"evsplatfi", VX (4, 555), VX_MASK, PPCSPE, 0, {RS, SIMM}},
5572 {"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5615 {"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
5635 {"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
10201 {"zvsplatih", VX_LSP(4, 0x23F), VX_LSP_MASK, PPCLSP, 0, {RD, SIMM}},
[all...] |
