Home | History | Annotate | Line # | Download | only in mii 
      1 /*	$NetBSD: amhphyreg.h,v 1.2 2024/06/06 21:17:37 andvar Exp $	*/
      2 
      3 /*
      4  * Copyright 2001 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #ifndef _DEV_MII_AMHPHYREG_H_
     39 #define	_DEV_MII_AMHPHYREG_H_
     40 
     41 /*
     42  * Registers on the 10BASE-T portion of the Am79c901 PHY.
     43  */
     44 
     45 #define	MII_AMHPHY_SER		0x10	/* status and enable register */
     46 #define	SER_STE			0x2000	/* status test enable */
     47 #define	SER_LSCE		0x1000	/* link status change enable */
     48 #define	SER_DMCE		0x0800	/* duplex mode change enable */
     49 #define	SER_ANCE		0x0400	/* auto-negotiation change enable */
     50 #define	SER_SCE			0x0200	/* speed change enable */
     51 #define	SER_GE			0x0100	/* global enable */
     52 #define	SER_LSC			0x0010	/* link status change */
     53 #define	SER_DMC			0x0008	/* duplex mode change */
     54 #define	SER_ANC			0x0004	/* auto-negotiation change */
     55 #define	SER_SC			0x0002	/* speed change */
     56 #define	SER_G			0x0001	/* global event pending */
     57 
     58 
     59 #define	MII_AMHPHY_PCSR		0x11	/* PHY control/status register */
     60 #define	PCSR_FLGE		0x2000	/* force link good enable */
     61 #define	PCSR_DLP		0x1000	/* disable link pulse */
     62 #define	PCSR_SQE_DIS		0x0800	/* SQE test disable */
     63 #define	PCSR_JDD		0x0200	/* jabber detect disable */
     64 #define	PCSR_RPR		0x0040	/* receive polarity reversed */
     65 #define	PCSR_ARPCD		0x0020	/* auto receive polarity corr dis */
     66 #define	PCSR_EDE		0x0010	/* extended distance enable */
     67 #define	PCSR_TX_DISABLE		0x0008	/* Tx disable */
     68 #define	PCSR_TX_CRS_EN		0x0004	/* CRS enable */
     69 #define	PCSR_PHY_ISOLATED	0x0001	/* 10BASE-T PHY is isolated */
     70 
     71 
     72 #define	MII_AMHPHY_MER		0x13	/* management extension register */
     73 #define	MER_MFF			0x0020	/* management frame format error */
     74 #define	MER_PHYADDR		0x001f	/* PHY address */
     75 
     76 
     77 #define	MII_AMHPHY_SSR		0x18	/* summary status register */
     78 #define	SSR_LS			0x0008	/* link status */
     79 #define	SSR_FD			0x0004	/* full-duplex */
     80 #define	SSR_ANA			0x0002	/* autonegotiation alert */
     81 #define	SSR_S			0x0001	/* speed (1 = 100Mb/s) */
     82 
     83 
     84 #endif /* _DEV_MII_AMHPHYREG_H_ */
     85