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      1 /*	$NetBSD: stratix10-clock.h,v 1.1.1.2 2020/01/03 14:33:05 skrll Exp $	*/
      2 
      3 /* SPDX-License-Identifier:	GPL-2.0 */
      4 /*
      5  * Copyright (C) 2017, Intel Corporation
      6  */
      7 
      8 #ifndef __STRATIX10_CLOCK_H
      9 #define __STRATIX10_CLOCK_H
     10 
     11 /* fixed rate clocks */
     12 #define STRATIX10_OSC1			0
     13 #define STRATIX10_CB_INTOSC_HS_DIV2_CLK	1
     14 #define STRATIX10_CB_INTOSC_LS_CLK	2
     15 #define STRATIX10_F2S_FREE_CLK		3
     16 
     17 /* fixed factor clocks */
     18 #define STRATIX10_L4_SYS_FREE_CLK	4
     19 #define STRATIX10_MPU_PERIPH_CLK	5
     20 #define STRATIX10_MPU_L2RAM_CLK		6
     21 #define STRATIX10_SDMMC_CIU_CLK		7
     22 
     23 /* PLL clocks */
     24 #define STRATIX10_MAIN_PLL_CLK		8
     25 #define STRATIX10_PERIPH_PLL_CLK	9
     26 #define STRATIX10_BOOT_CLK		10
     27 
     28 /* Periph clocks */
     29 #define STRATIX10_MAIN_MPU_BASE_CLK	11
     30 #define STRATIX10_MAIN_NOC_BASE_CLK	12
     31 #define STRATIX10_MAIN_EMACA_CLK	13
     32 #define STRATIX10_MAIN_EMACB_CLK	14
     33 #define STRATIX10_MAIN_EMAC_PTP_CLK	15
     34 #define STRATIX10_MAIN_GPIO_DB_CLK	16
     35 #define STRATIX10_MAIN_SDMMC_CLK	17
     36 #define STRATIX10_MAIN_S2F_USR0_CLK	18
     37 #define STRATIX10_MAIN_S2F_USR1_CLK	19
     38 #define STRATIX10_MAIN_PSI_REF_CLK	20
     39 
     40 #define STRATIX10_PERI_MPU_BASE_CLK	21
     41 #define STRATIX10_PERI_NOC_BASE_CLK	22
     42 #define STRATIX10_PERI_EMACA_CLK	23
     43 #define STRATIX10_PERI_EMACB_CLK	24
     44 #define STRATIX10_PERI_EMAC_PTP_CLK	25
     45 #define STRATIX10_PERI_GPIO_DB_CLK	26
     46 #define STRATIX10_PERI_SDMMC_CLK	27
     47 #define STRATIX10_PERI_S2F_USR0_CLK	28
     48 #define STRATIX10_PERI_S2F_USR1_CLK	29
     49 #define STRATIX10_PERI_PSI_REF_CLK	30
     50 
     51 #define STRATIX10_MPU_FREE_CLK		31
     52 #define STRATIX10_NOC_FREE_CLK		32
     53 #define STRATIX10_S2F_USR0_CLK		33
     54 #define STRATIX10_NOC_CLK		34
     55 #define STRATIX10_EMAC_A_FREE_CLK	35
     56 #define STRATIX10_EMAC_B_FREE_CLK	36
     57 #define STRATIX10_EMAC_PTP_FREE_CLK	37
     58 #define STRATIX10_GPIO_DB_FREE_CLK	38
     59 #define STRATIX10_SDMMC_FREE_CLK	39
     60 #define STRATIX10_S2F_USER1_FREE_CLK	40
     61 #define STRATIX10_PSI_REF_FREE_CLK	41
     62 
     63 /* Gate clocks */
     64 #define STRATIX10_MPU_CLK		42
     65 #define STRATIX10_L4_MAIN_CLK		43
     66 #define STRATIX10_L4_MP_CLK		44
     67 #define STRATIX10_L4_SP_CLK		45
     68 #define STRATIX10_CS_AT_CLK		46
     69 #define STRATIX10_CS_TRACE_CLK		47
     70 #define STRATIX10_CS_PDBG_CLK		48
     71 #define STRATIX10_CS_TIMER_CLK		49
     72 #define STRATIX10_S2F_USER0_CLK		50
     73 #define STRATIX10_S2F_USER1_CLK		51
     74 #define STRATIX10_EMAC0_CLK		52
     75 #define STRATIX10_EMAC1_CLK		53
     76 #define STRATIX10_EMAC2_CLK		54
     77 #define STRATIX10_EMAC_PTP_CLK		55
     78 #define STRATIX10_GPIO_DB_CLK		56
     79 #define STRATIX10_SDMMC_CLK		57
     80 #define STRATIX10_PSI_REF_CLK		58
     81 #define STRATIX10_USB_CLK		59
     82 #define STRATIX10_SPI_M_CLK		60
     83 #define STRATIX10_NAND_CLK		61
     84 #define STRATIX10_NAND_X_CLK		62
     85 #define STRATIX10_NAND_ECC_CLK		63
     86 #define STRATIX10_NUM_CLKS		64
     87 
     88 #endif	/* __STRATIX10_CLOCK_H */
     89