1 /* $NetBSD: et4000.c,v 1.29 2023/12/20 00:40:43 thorpej Exp $ */ 2 /*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Julian Coleman. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* 32 * Thanks to: 33 * Leo Weppelman 34 * 'Maximum Entropy' 35 * Thomas Gerner 36 * Juergen Orscheidt 37 * for their help and for code that I could refer to when writing this driver. 38 * 39 * Defining DEBUG_ET4000 will cause the driver to *always* attach. Use for 40 * debugging register settings. 41 */ 42 43 /* 44 #define DEBUG_ET4000 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: et4000.c,v 1.29 2023/12/20 00:40:43 thorpej Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/ioctl.h> 52 #include <sys/queue.h> 53 #include <sys/device.h> 54 #include <sys/systm.h> 55 #include <sys/conf.h> 56 #include <sys/event.h> 57 #include <atari/vme/vmevar.h> 58 59 #include <machine/iomap.h> 60 #include <machine/video.h> 61 #include <machine/mfp.h> 62 #include <machine/cpu.h> 63 #include <atari/atari/device.h> 64 #include <atari/dev/grfioctl.h> 65 #include <atari/dev/grf_etreg.h> 66 67 #include "ioconf.h" 68 69 /* 70 * Allow a 8Kb io-region and a 1MB frame buffer to be mapped. This 71 * is more or less required by the XFree server. The X server also 72 * requires that the frame buffer be mapped above 0x3fffff. 73 */ 74 #define REG_MAPPABLE (8 * 1024) /* 0x2000 */ 75 #define FRAME_MAPPABLE (1 * 1024 * 1024) /* 0x100000 */ 76 #define FRAME_BASE (4 * 1024 * 1024) /* 0x400000 */ 77 #define VGA_MAPPABLE (128 * 1024) /* 0x20000 */ 78 #define VGA_BASE 0xa0000 79 80 static int et4k_vme_match(device_t, cfdata_t, void *); 81 static void et4k_vme_attach(device_t, device_t, void *); 82 static int et4k_probe_addresses(struct vme_attach_args *); 83 static void et4k_start(bus_space_tag_t *, bus_space_handle_t *, int *, 84 u_char *); 85 static void et4k_stop(bus_space_tag_t *, bus_space_handle_t *, int *, 86 u_char *); 87 static int et4k_detect(bus_space_tag_t *, bus_space_tag_t *, 88 bus_space_handle_t *, bus_space_handle_t *, u_int); 89 90 int et4kon(dev_t); 91 int et4koff(dev_t); 92 93 /* Register and screen memory addresses for ET4000 based VME cards */ 94 static struct et4k_addresses { 95 u_long io_addr; 96 u_long io_size; 97 u_long mem_addr; 98 u_long mem_size; 99 } et4kstd[] = { 100 { 0xfebf0000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Crazy Dots VME & II */ 101 { 0xfed00000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Spektrum I & HC */ 102 { 0xfed80000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE } /* Spektrum TC */ 103 }; 104 105 #define NET4KSTD (sizeof(et4kstd) / sizeof(et4kstd[0])) 106 107 struct grfabs_et4k_priv { 108 volatile void * regkva; 109 volatile void * memkva; 110 int regsz; 111 int memsz; 112 } et4k_priv; 113 114 struct et4k_softc { 115 device_t sc_dev; 116 bus_space_tag_t sc_iot; 117 bus_space_tag_t sc_memt; 118 bus_space_handle_t sc_ioh; 119 bus_space_handle_t sc_memh; 120 int sc_flags; 121 int sc_iobase; 122 int sc_maddr; 123 int sc_iosize; 124 int sc_msize; 125 }; 126 127 #define ET_SC_FLAGS_INUSE 1 128 129 CFATTACH_DECL_NEW(et4k, sizeof(struct et4k_softc), 130 et4k_vme_match, et4k_vme_attach, NULL, NULL); 131 132 static dev_type_open(et4kopen); 133 static dev_type_close(et4kclose); 134 static dev_type_read(et4kread); 135 static dev_type_write(et4kwrite); 136 static dev_type_ioctl(et4kioctl); 137 static dev_type_mmap(et4kmmap); 138 139 const struct cdevsw et4k_cdevsw = { 140 .d_open = et4kopen, 141 .d_close = et4kclose, 142 .d_read = et4kread, 143 .d_write = et4kwrite, 144 .d_ioctl = et4kioctl, 145 .d_stop = nostop, 146 .d_tty = notty, 147 .d_poll = nopoll, 148 .d_mmap = et4kmmap, 149 .d_kqfilter = nokqfilter, 150 .d_discard = nodiscard, 151 .d_flag = 0 152 }; 153 154 /* 155 * Look for a ET4000 (Crazy Dots) card on the VME bus. We might 156 * match Spektrum cards too (untested). 157 */ 158 int 159 et4k_vme_match(device_t parent, cfdata_t cf, void *aux) 160 { 161 struct vme_attach_args *va = aux; 162 163 return et4k_probe_addresses(va); 164 } 165 166 static int 167 et4k_probe_addresses(struct vme_attach_args *va) 168 { 169 int i, found = 0; 170 bus_space_tag_t iot; 171 bus_space_tag_t memt; 172 bus_space_handle_t ioh; 173 bus_space_handle_t memh; 174 175 iot = va->va_iot; 176 memt = va->va_memt; 177 178 /* Loop around our possible addresses looking for a match */ 179 for (i = 0; i < NET4KSTD; i++) { 180 struct et4k_addresses *et4k_ap = &et4kstd[i]; 181 struct vme_attach_args vat = *va; 182 183 if (vat.va_irq != VMECF_IRQ_DEFAULT) { 184 printf("%s: config error: no irq support\n", __func__); 185 return 0; 186 } 187 if (vat.va_iobase == VMECF_IOPORT_DEFAULT) 188 vat.va_iobase = et4k_ap->io_addr; 189 if (vat.va_maddr == VMECF_MEM_DEFAULT) 190 vat.va_maddr = et4k_ap->mem_addr; 191 if (vat.va_iosize == VMECF_IOSIZE_DEFAULT) 192 vat.va_iosize = et4k_ap->io_size; 193 if (vat.va_msize == VMECF_MEMSIZ_DEFAULT) 194 vat.va_msize = et4k_ap->mem_size; 195 if (bus_space_map(iot, vat.va_iobase, vat.va_iosize, 0, 196 &ioh)) { 197 printf("%s: cannot map io area\n", __func__); 198 return 0; 199 } 200 if (bus_space_map(memt, vat.va_maddr, vat.va_msize, 201 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_CACHEABLE, 202 &memh)) { 203 bus_space_unmap(iot, ioh, vat.va_iosize); 204 printf("%s: cannot map memory area\n", __func__); 205 return 0; 206 } 207 found = et4k_detect(&iot, &memt, &ioh, &memh, vat.va_msize); 208 bus_space_unmap(iot, ioh, vat.va_iosize); 209 bus_space_unmap(memt, memh, vat.va_msize); 210 if (found) { 211 *va = vat; 212 return 1; 213 } 214 } 215 return 0; 216 } 217 218 static void 219 et4k_start(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 220 { 221 /* Enable VGA */ 222 bus_space_write_1(*iot, *ioh, GREG_VIDEOSYSENABLE, 0x01); 223 /* Check whether colour (base = 3d0) or mono (base = 3b0) mode */ 224 *vgabase = (bus_space_read_1(*iot, *ioh, GREG_MISC_OUTPUT_R) & 0x01) 225 ? 0x3d0 : 0x3b0; 226 /* Enable 'Tseng Extensions' - writes to CRTC and ATC[16] */ 227 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x03); 228 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0xa0); 229 /* Set up 16 bit I/O, memory, Tseng addressing and linear mapping */ 230 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x36); 231 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, 0xf0); 232 /* Enable writes to CRTC[0..7] */ 233 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 234 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 235 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved & 0x7f); 236 /* Map all memory for video modes */ 237 bus_space_write_1(*iot, *ioh, 0x3ce, 0x06); 238 bus_space_write_1(*iot, *ioh, 0x3cf, 0x01); 239 } 240 241 static void 242 et4k_stop(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 243 { 244 /* Restore writes to CRTC[0..7] */ 245 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 246 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 247 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved | 0x80); 248 /* Disable 'Tseng Extensions' */ 249 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0x00); 250 bus_space_write_1(*iot, *ioh, GREG_DISPMODECONTROL, 0x29); 251 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x01); 252 } 253 254 static int 255 et4k_detect(bus_space_tag_t *iot, bus_space_tag_t *memt, bus_space_handle_t *ioh, bus_space_handle_t *memh, u_int memsize) 256 { 257 u_char orig, new, saved; 258 int vgabase; 259 260 /* Test accessibility of registers and memory */ 261 if (!bus_space_peek_1(*iot, *ioh, GREG_STATUS1_R)) 262 return 0; 263 if (!bus_space_peek_1(*memt, *memh, 0)) 264 return 0; 265 266 et4k_start(iot, ioh, &vgabase, &saved); 267 268 /* Is the card a Tseng card? Check read/write of ATC[16] */ 269 (void)bus_space_read_1(*iot, *ioh, vgabase + 0x0a); 270 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 271 orig = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 272 bus_space_write_1(*iot, *ioh, ACT_ADDRESS_W, (orig ^ 0x10)); 273 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 274 new = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 275 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, orig); 276 if (new != (orig ^ 0x10)) { 277 #ifdef DEBUG_ET4000 278 printf("et4000: ATC[16] failed (%x != %x)\n", 279 new, (orig ^ 0x10)); 280 #else 281 et4k_stop(iot, ioh, &vgabase, &saved); 282 return 0; 283 #endif 284 } 285 /* Is the card and ET4000? Check read/write of CRTC[33] */ 286 bus_space_write_1(*iot, *ioh, vgabase + 0x04, 0x33); 287 orig = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 288 bus_space_write_1(*iot, *ioh, vgabase + 0x05, (orig ^ 0x0f)); 289 new = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 290 bus_space_write_1(*iot, *ioh, vgabase + 0x05, orig); 291 if (new != (orig ^ 0x0f)) { 292 #ifdef DEBUG_ET4000 293 printf("et4000: CRTC[33] failed (%x != %x)\n", 294 new, (orig ^ 0x0f)); 295 #else 296 et4k_stop(iot, ioh, &vgabase, &saved); 297 return 0; 298 #endif 299 } 300 301 /* Set up video memory so we can read & write it */ 302 bus_space_write_1(*iot, *ioh, 0x3c4, 0x04); 303 bus_space_write_1(*iot, *ioh, 0x3c5, 0x06); 304 bus_space_write_1(*iot, *ioh, 0x3c4, 0x07); 305 bus_space_write_1(*iot, *ioh, 0x3c5, 0xa8); 306 bus_space_write_1(*iot, *ioh, 0x3ce, 0x01); 307 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 308 bus_space_write_1(*iot, *ioh, 0x3ce, 0x03); 309 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 310 bus_space_write_1(*iot, *ioh, 0x3ce, 0x05); 311 bus_space_write_1(*iot, *ioh, 0x3cf, 0x40); 312 313 #define TEST_PATTERN 0xa5a5a5a5 314 315 bus_space_write_4(*memt, *memh, 0x0, TEST_PATTERN); 316 if (bus_space_read_4(*memt, *memh, 0x0) != TEST_PATTERN) 317 { 318 #ifdef DEBUG_ET4000 319 printf("et4000: Video base write/read failed\n"); 320 #else 321 et4k_stop(iot, ioh, &vgabase, &saved); 322 return 0; 323 #endif 324 } 325 bus_space_write_4(*memt, *memh, memsize - 4, TEST_PATTERN); 326 if (bus_space_read_4(*memt, *memh, memsize - 4) != TEST_PATTERN) 327 { 328 #ifdef DEBUG_ET4000 329 printf("et4000: Video top write/read failed\n"); 330 #else 331 et4k_stop(iot, ioh, &vgabase, &saved); 332 return 0; 333 #endif 334 } 335 336 et4k_stop(iot, ioh, &vgabase, &saved); 337 return 1; 338 } 339 340 static void 341 et4k_vme_attach(device_t parent, device_t self, void *aux) 342 { 343 struct et4k_softc *sc = device_private(self); 344 struct vme_attach_args *va = aux; 345 bus_space_handle_t ioh; 346 bus_space_handle_t memh; 347 348 sc->sc_dev = self; 349 350 printf("\n"); 351 352 if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh)) 353 panic("%s: cannot map io area", __func__); 354 if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh)) 355 panic("%s: cannot map mem area", __func__); 356 357 sc->sc_iot = va->va_iot; 358 sc->sc_ioh = ioh; 359 sc->sc_memt = va->va_memt; 360 sc->sc_memh = memh; 361 sc->sc_flags = 0; 362 sc->sc_iobase = va->va_iobase; 363 sc->sc_maddr = va->va_maddr; 364 sc->sc_iosize = va->va_iosize; 365 sc->sc_msize = va->va_msize; 366 367 et4k_priv.regkva = (volatile void *)ioh; 368 et4k_priv.memkva = (volatile void *)memh; 369 et4k_priv.regsz = va->va_iosize; 370 et4k_priv.memsz = va->va_msize; 371 } 372 373 int 374 et4kopen(dev_t dev, int flags, int devtype, struct lwp *l) 375 { 376 struct et4k_softc *sc; 377 378 sc = device_lookup_private(&et4k_cd, minor(dev)); 379 if (sc == NULL) 380 return ENXIO; 381 if (sc->sc_flags & ET_SC_FLAGS_INUSE) 382 return EBUSY; 383 sc->sc_flags |= ET_SC_FLAGS_INUSE; 384 return 0; 385 } 386 387 int 388 et4kclose(dev_t dev, int flags, int devtype, struct lwp *l) 389 { 390 struct et4k_softc *sc; 391 392 /* 393 * XXX: Should we reset to a default mode? 394 */ 395 sc = device_lookup_private(&et4k_cd, minor(dev)); 396 sc->sc_flags &= ~ET_SC_FLAGS_INUSE; 397 return 0; 398 } 399 400 int 401 et4kread(dev_t dev, struct uio *uio, int flags) 402 { 403 404 return EINVAL; 405 } 406 407 int 408 et4kwrite(dev_t dev, struct uio *uio, int flags) 409 { 410 411 return EINVAL; 412 } 413 414 int 415 et4kioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 416 { 417 struct grfinfo g_display; 418 struct et4k_softc *sc; 419 420 sc = device_lookup_private(&et4k_cd, minor(dev)); 421 switch (cmd) { 422 case GRFIOCON: 423 return 0; 424 break; 425 case GRFIOCOFF: 426 return 0; 427 break; 428 case GRFIOCGINFO: 429 g_display.gd_fbaddr = (void *) (sc->sc_maddr); 430 g_display.gd_fbsize = sc->sc_msize; 431 g_display.gd_linbase = FRAME_BASE; 432 g_display.gd_regaddr = (void *) (sc->sc_iobase); 433 g_display.gd_regsize = sc->sc_iosize; 434 g_display.gd_vgaaddr = (void *) (sc->sc_maddr); 435 g_display.gd_vgasize = VGA_MAPPABLE; 436 g_display.gd_vgabase = VGA_BASE; 437 g_display.gd_colors = 16; 438 g_display.gd_planes = 4; 439 g_display.gd_fbwidth = 640; /* XXX: should be 'unknown' */ 440 g_display.gd_fbheight = 400; /* XXX: should be 'unknown' */ 441 g_display.gd_fbx = 0; 442 g_display.gd_fby = 0; 443 g_display.gd_dwidth = 0; 444 g_display.gd_dheight = 0; 445 g_display.gd_dx = 0; 446 g_display.gd_dy = 0; 447 g_display.gd_bank_size = 0; 448 memcpy(data, (void *)&g_display, sizeof(struct grfinfo)); 449 break; 450 case GRFIOCMAP: 451 return EINVAL; 452 break; 453 case GRFIOCUNMAP: 454 return EINVAL; 455 break; 456 default: 457 return EINVAL; 458 break; 459 } 460 return 0; 461 } 462 463 paddr_t 464 et4kmmap(dev_t dev, off_t offset, int prot) 465 { 466 struct et4k_softc *sc; 467 468 sc = device_lookup_private(&et4k_cd, minor(dev)); 469 470 /* 471 * control registers 472 * mapped from offset 0x0 to REG_MAPPABLE 473 */ 474 if (offset >= 0 && offset <= sc->sc_iosize) 475 return m68k_btop(sc->sc_iobase + offset); 476 477 /* 478 * VGA memory 479 * mapped from offset 0xa0000 to 0xc0000 480 */ 481 if (offset >= VGA_BASE && offset < (VGA_MAPPABLE + VGA_BASE)) 482 return m68k_btop(sc->sc_maddr + offset - VGA_BASE); 483 484 /* 485 * frame buffer 486 * mapped from offset 0x400000 to 0x4fffff 487 */ 488 if (offset >= FRAME_BASE && offset < sc->sc_msize + FRAME_BASE) 489 return m68k_btop(sc->sc_maddr + offset - FRAME_BASE); 490 491 return -1; 492 } 493 494 int 495 et4kon(dev_t dev) 496 { 497 struct et4k_softc *sc; 498 499 if (minor(dev) >= et4k_cd.cd_ndevs) 500 return ENXIO; 501 sc = device_lookup_private(&et4k_cd, minor(dev)); 502 if (sc == NULL) 503 return ENXIO; 504 return 0; 505 } 506 507 int 508 et4koff(dev_t dev) 509 { 510 511 return 0; 512 } 513 514
Indexes created Fri Sep 26 20:09:58 GMT 2025